Staff Design Engineer - Cork, Ireland

Qualcomm

Cork

On-site

EUR 120,000 - 160,000

Full time

5 hours ago
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Benefits offered by this job

Salary, stock and performance related
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support
Life, Medical, Income and Travel보험
Subsidised memberships for physical &_

Job summary

QT Technologies Ireland Limited in Cork, Ireland, seeks a Senior Staff Engineer to provide deep technical leadership in ASIC design and SoC architecture across multiple business units. You will drive micro-architecture, RTL development, and cross-functional collaboration while mentoring engineers and influencing long-term design direction.

The role emphasizes optimization for area, power, and performance, support for post-silicon bring-up, and robust documentation.

Qualifications

  • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Responsibilities

  • Micro-Architecture and Technical Leadership: Driving micro-architecture for both simple and highly complex digital blocks, making key design trade-offs, and providing technical leadership across the subsystem.
  • RTL Development and Design Quality: Leading RTL (Register Transfer Level) development using industry best practices. This includes handling multi-clock designs, high-frequency requirements, low power, and low latency considerations while ensuring high performance, scalability, and design robustness.
  • Debugging and Post-Silicon Bring-Up: Leading root-cause analysis and resolution of complex design issues during development and supporting post-silicon bring-up activities across cross-functional teams.
  • Documentation and Reviews: Creating comprehensive design documentation, driving high-quality design and architecture reviews, and ensuring clarity, maintainability, and reuse across projects.
  • Design Optimization: Driving optimization for key metrics such as area, power, and performance while balancing product requirements, implementation constraints, and long-term architectural goals.
  • Cross-Functional Collaboration and Mentorship: Partnering closely with DFT (Design for Testability), Implementation, Verification, Emulation, and Firmware teams, while mentoring junior engineers and influencing technical direction across the wider organization.

Skills

ASIC design
RTL design
Micro-architecture
Technical leadership
Debugging
Embedded SoC
Power optimization

Education

Bachelor's degree in Science/Engineering
Master's degree in Science/Engineering
PhD in Science/Engineering

Tools

Standard digital design tools

Job description

Company:

QT Technologies Ireland Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

The Microcontroller Sub-System IP team plays a crucial role in enabling embedded processing solutions across various functions and products at Qualcomm. This team deals with security, power management, and other system-on-chip (SoC) functions across multiple business units (IoT, Mobile, Auto, XR, Compute, etc.). We are seeking a Senior Staff Engineer who can provide deep technical leadership, drive architecture and design excellence, and influence subsystem direction across complex programs. If you’re passionate about solving complex problems and want to be part of a diverse, multicultural team, read on!

Minimum Qualifications:
  • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Responsibilities:
  • Micro-Architecture and Technical Leadership: Driving micro-architecture for both simple and highly complex digital blocks, making key design trade-offs, and providing technical leadership across the subsystem.
  • RTL Development and Design Quality: Leading RTL (Register Transfer Level) development using industry best practices. This includes handling multi-clock designs, high-frequency requirements, low power, and low latency considerations while ensuring high performance, scalability, and design robustness.
  • Debugging and Post-Silicon Bring-Up: Leading root-cause analysis and resolution of complex design issues during development and supporting post-silicon bring-up activities across cross-functional teams.
  • Documentation and Reviews: Creating comprehensive design documentation, driving high-quality design and architecture reviews, and ensuring clarity, maintainability, and reuse across projects.
  • Design Optimization: Driving optimization for key metrics such as area, power, and performance while balancing product requirements, implementation constraints, and long-term architectural goals.
  • Cross-Functional Collaboration and Mentorship: Partnering closely with DFT (Design for Testability), Implementation, Verification, Emulation, and Firmware teams, while mentoring junior engineers and influencing technical direction across the wider organization.

Positive Attitude: Bring a fun-loving attitude and a passion for inclusively solving problems.

  • Education: Bachelor’s degree in Science, Engineering, or a related field.
  • Experience: 5+ years of ASIC design experience, including significant ownership of complex subsystem or SoC design deliverables.
  • Complex Digital Logic Design: Proven experience designing and delivering complex digital logic blocks and subsystems in high-performance, low-power environments.
  • ISA Familiarity: Knowledge of ISAs (Instruction Set Architectures) such as ARM THUMB or RISC-V.
  • Processor/Microcontroller System Design: Strong understanding of processor or microcontroller system design, with the ability to influence subsystem architecture and integration decisions.
  • Multi-Power Domain and Multi-Clock Domain Designs: Deep experience with designs spanning multiple power domains and clock domains, including associated design and verification challenges.
  • Scripting/Automation Languages: Proficiency in scripting or automation languages like Python or Perl.
  • Technical Leadership: Demonstrated ability to lead technically across teams, mentor engineers, influence design methodology, and drive execution on complex, cross-functional programs.
  • Industry Standard Digital Tools: Familiarity with state-of-the-art industry-standard digital design tools.
  • Challenges of Lower Node Technologies: Strong awareness of the challenges and trade-offs associated with lower node technologies and their impact on architecture, design, and implementation.
Where you will be working

Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies.

There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life.

A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.

Equal Opportunities

We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.

What's On Offer
  • Salary, stock and performance related bonus
  • Maternity/Paternity Leave
  • Employee stock purchase scheme
  • Matching pension scheme
  • Education Assistance
  • Relocation and immigration support (if needed)
  • Life, Medical, Income and Travel Insurance
  • Subsidised memberships for physical and mental well-being
  • Bicycle purchase scheme
  • Employee run clubs, including, running, football, chess, badminton + many more
Minimum Qualifications:
  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field.
  • References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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