Senior RFIC Design Engineer

Berkley Group; Cork; On-site; EUR 90,000 - 120,000; Full time

Job summary

Berkley Group is seeking a Senior RFIC Design Engineer on a 6-month contract to design, simulate and verify complex RFIC/analogue blocks within a complete Rx/Tx chain. You will review specifications, translate requirements into robust circuit designs and perform full schematic and top-level verification.

The role requires hands-on experience with Cadence tools (ADE/XL, Maestro), Spectre/SpectreRF and Verilog-A, as well as strong collaboration with layout engineers and cross-functional teams.

Qualifications

• 5+ years hands-on RFIC design experience.
• Strong RFIC and analogue IC design expertise, including sub-cells and small subsystems.
• CMOS IC design and analogue circuit experience.
• Cadence tools experience: ADE/XL and Maestro.
• Spectre/SpectreRF and AMS simulation experience.
• Verilog-A modelling for analogue/RF.
• Rx/Tx chain verification, RF-to-IF simulations.
• Collaboration with layout engineers and cross-functional teams.
• Desirable: 22nm CMOS, LO, LNA, RF mixers.

Responsibilities

• Design, simulate and verify RFIC and analogue blocks within a full Rx/Tx signal chain.
• Review specifications and translate requirements into robust circuit designs.
• Carry out schematic design and simulation to meet technical specs.
• Perform Rx/Tx chain verification between RF and IF ports and post-layout parasitic checks.
• Collaborate with layout engineers and participate in block-level reviews.

Skills

RFIC design

analogue IC design

CMOS IC design

Rx/Tx chain verification

layout collaboration

Tools

Cadence ADE/XL Maestro

Spectre

SpectreRF

Verilog-A

AMS simulation

Job description

My client, a leading technology organisation, is on the lookout for a Senior RFIC Design Engineer on a 6 month contract.

The Job:

• Design, simulate and verify complex RFIC and analogue IC blocks within a full Rx/Tx signal chain.
• Review block specifications and translate requirements into robust circuit designs.
• Perform schematic design and simulation, reporting compliance against technical specifications.
• Carry out full Rx/Tx chain verification simulations between RF and IF ports.
• Complete top-level verification simulations, including reporting compliance to specification.
• Validate device register controls and settings for testing and verification.
• Work closely with layout engineers, overseeing layout activities and ensuring designs are implemented correctly.
• Perform post-layout parasitic simulations and make the necessary design adjustments.
• Liaise with technical leads to integrate designs and present designs during block-level technical reviews.
• Deliver fully verified blocks, troubleshoot complex problems in a constrained environment, and contribute technical expertise across analogue sub-cells and small subsystems, while keeping up to date with new developments in analogue/RFIC design.

Have you:

• 5+ years of hands-on experience in RFIC design.
• Strong hands-on experience in RFIC and analogue IC design, including complex sub-cells and small subsystems.
• Experience with CMOS IC design and analogue circuit design.
• Hands-on experience with Cadence, including ADE/XL and Maestro.
• Strong experience with Spectre and SpectreRF simulation tools.
• Experience with AMS (Analog/Mixed-Signal) simulation.
• Experience using Verilog-A for analogue/RF modelling or simulation.
• Experience with Rx/Tx chain verification, RF-to-IF simulations, post-layout parasitic simulation and specification compliance.
• Experience working with layout engineers, technical leads and cross-functional engineering teams, including design integration and block-level reviews.
• Experience with any of the following is desirable: 22nm CMOS, IF Filters, Local Oscillators (LO), Low-Noise Amplifiers (LNA), and RF Mixers.