Senior RFIC & Analog IC Design Engineer

Berkley Group; Cork; On-site; EUR 90,000 - 120,000; Full time

Job summary

Berkley Group is seeking a Senior RFIC Design Engineer on a 6-month contract to design, simulate and verify complex RFIC/analogue blocks within a complete Rx/Tx chain. You will review specifications, translate requirements into robust circuit designs and perform full schematic and top-level verification.

The role requires hands-on experience with Cadence tools (ADE/XL, Maestro), Spectre/SpectreRF and Verilog-A, as well as strong collaboration with layout engineers and cross-functional teams.

Qualifications

• 5+ years hands-on RFIC design experience.
• Strong RFIC and analogue IC design expertise, including sub-cells and small subsystems.
• CMOS IC design and analogue circuit experience.
• Cadence tools experience: ADE/XL and Maestro.
• Spectre/SpectreRF and AMS simulation experience.
• Verilog-A modelling for analogue/RF.
• Rx/Tx chain verification, RF-to-IF simulations.
• Collaboration with layout engineers and cross-functional teams.
• Desirable: 22nm CMOS, LO, LNA, RF mixers.

Responsibilities

• Design, simulate and verify RFIC and analogue blocks within a full Rx/Tx signal chain.
• Review specifications and translate requirements into robust circuit designs.
• Carry out schematic design and simulation to meet technical specs.
• Perform Rx/Tx chain verification between RF and IF ports and post-layout parasitic checks.
• Collaborate with layout engineers and participate in block-level reviews.

Skills

RFIC design

analogue IC design

CMOS IC design

Rx/Tx chain verification

layout collaboration

Tools

Cadence ADE/XL Maestro

Spectre

SpectreRF

Verilog-A

AMS simulation

Job description

Berkley Group is seeking a Senior RFIC Design Engineer on a 6-month contract to design, simulate and verify complex RFIC/analogue blocks within a complete Rx/Tx chain. You will review specifications, translate requirements into robust circuit designs and perform full schematic and top-level verification.

The role requires hands-on experience with Cadence tools (ADE/XL, Maestro), Spectre/SpectreRF and Verilog-A, as well as strong collaboration with layout engineers and cross-functional teams.