Principal Digital ASIC Design Engineer

Intellectual Capital Resources Ltd; Galway; On-site; EUR 90,000 - 150,000; Full time

Job summary

Intellectual Capital Resources Ltd in Galway is seeking a Principal Digital ASIC Design Engineer to join a seasoned semiconductor team. You will influence architecture and own front-end RTL development for complex ASIC/SoC projects.

The role requires hands-on Verilog RTL, strong knowledge of SoC architecture, and the ability to lead across multidisciplinary teams, driving design quality, performance and development efficiency.

Qualifications

• Strong experience in ASIC/SoC or digital IC design.
• Hands-on Verilog RTL experience.
• Knowledge of SoC architecture and front-end design.
• Experience with synthesis, lint and CDC.
• Experience providing technical leadership on projects.
• Strong communication skills and ability to work across multidisciplinary teams.

Responsibilities

• Contributing to the architecture and development of complex digital designs.
• Developing and optimising RTL within an advanced ASIC development environment.
• Working closely with Design Verification and other engineering teams throughout development.
• Driving improvements to design quality, performance and development efficiency.
• Providing technical leadership and helping shape engineering methodologies.

Skills

ASIC/SoC design

Verilog RTL

Front-end design

Synthesis

Lint

CDC

Technical leadership

Cross-functional collaboration

Job description

An exciting opportunity has arisen for a Principal Digital ASIC Design Engineer to join a highly experienced semiconductor engineering team in Galway. This is a senior technical position offering the opportunity to work on complex ASIC and SoC development, with significant involvement across architecture, RTL design and front end development.

The role will involve:

• Contributing to the architecture and development of complex digital designs
• Developing and optimising RTL within an advanced ASIC development environment
• Working closely with Design Verification and other engineering teams throughout development
• Driving improvements to design quality, performance and development efficiency
• Providing technical leadership and helping shape engineering methodologies

The ideal candidate will have:

• Strong commercial experience in ASIC, SoC or digital IC design
• Extensive hands on Verilog RTL experience
• Good knowledge of SoC architecture and front end design
• Experience with synthesis, lint and CDC
• Previous experience providing technical leadership within engineering projects
• Strong communication skills and the ability to work effectively across multidisciplinary teams

This Principal Design Engineer opportunity would suit an experienced engineer looking for greater technical ownership and influence while remaining close to the design work. The preference would be for this role to be based in Galway but this company has offices in the Cork and Dublin.

For more information please contact Jordan Browne.