MSIP Design Verification Engineer - Cork, Ireland

QUALCOMM, Inc.; Cork; On-site; EUR 75,000 - 110,000; Full time

Benefits offered by this job

Salary and bonus

Maternity Leave

Employee stock purchase

Matching pension

Education Assistance

Relocation and immigration support

Insurance

Well-being subsidies

Bicycle purchase scheme

Employee clubs

Job summary

QT Technologies Ireland Limited in Cork is seeking Mixed-Signal Design Verification Engineers to verify SerDes, DDR and PLL IP using SV/UVM in a cutting-edge environment.

You will collaborate with architecture, design and software teams across Ireland and Qualcomm locations, working on next-generation Snapdragon SoCs in advanced process nodes. A strong background in Verilog/SystemVerilog and mixed-signal verification is preferred.

Qualifications

• Experience in design and verification of hardware and software on SoCs/SoC_IP
• Knowledge in unit and SoC/IP level test benches using UVM
• Constrained random functional verification with SystemVerilog/UVM

Responsibilities

• SV/UVM based Design Verification of SerDes, DDR & PLL Mixed-Signal PHY IP
• Emulation experience is desired along with SV/UVM based simulation
• Collaborate with analog and digital front-end teams to verify RTL and Mixed-Signal designs
• Work with architecture, design, software and SoC teams to integrate IP into Snapdragon products

Skills

SV/UVM based verification

SerDes, DDR & PLL IP verification

SystemVerilog/UVM

Low power verification using UPF

GLS verification flow with SDF

Formal verification techniques

Python/TCL/Perl scripting

Verilog/SystemVerilog

Analog mixed-signal verification (plus

Excellent communication skills

Emulation experience

Debugging skills

Education

Bachelor's degree in Science or Engineering

Master's degree in Science or Engineering

PhD in Science or Engineering

Job description

Company:

QT Technologies Ireland Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

About the role

Qualcomm’s Mixed-Signal IP (MSIP) Design Verification team is seeking Mixed-Signal Design Verification Engineers to join our team in Cork, Ireland. The Qualcomm Cork site is home to a range of MSIP teams working on cutting edge designs for the latest Snapdragon SoCs in the latest technology nodes, and the successful candidate will work on mixed-signal verification for several key mixed-signal PHY IPs including DDR, USB, PCIE, eDP, DPRX, HDMI, SGMII, DSI, CSI as well as PLL IP and more.

The Design Verification team in Cork uses the latest tools and verification techniques in leading edge silicon nodes at 3nm and below and team members work directly with architecture, design, software and SoC teams in Ireland and other global Qualcomm locations.

Responsibilities Will Include:

• SV/UVM based Design Verification of SerDes, DDR & PLL Mixed-Signal PHY IP


• Emulation experience is desired along with SV/UVM based simulation.


• Work closely with analog and digital front-end design teams to verify RTL and Analog/Mixed-Signal Designs in next-generation SerDes, DDR & PLL IP


• Interact with architecture, design, physical design, software, test and SoC teams to verify and integrate SerDes, DDR & PLL IP designs into the latest Qualcomm Snapdragon products

Skills And Experience We Would Love To See

• Bachelor's degree in Engineering, Computer Science or related field.


• Experience in design and verification of hardware and software on SoCs and SoC/IP Methodologies for verifying complex units using industry standard tools and technologies


• Knowledge in developing unit and SoC/IP level test benches using UVM.


• Constrained random functional verification environment in System Verilog/UVM with excellent debugging skills.


• Experience in Low power verification using UPF at RTL and GLS simulation level.


• Experience in Power Aware Gate Level Simulation (GLS) verification flow with zero delay and SDF annotated simulation.


• Experience of pre and post-silicon verification testflow and automated test benches. Post silicon ATE/PTE vector bringup and bench characterization support.


• Knowledge of test-plan development, coverage (code/functional) analysis, transaction level modelling, constrained random verification, assertion based and formal verification techniques with System Verilog


• Experience with Verilog, SystemVerilog, Assertions, Python/TCL/Perl/shell-scripting.


• Experience in analog mixed signal verification techniques will be a plus.


• Excellent communication skills

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field.


• 2+ years design verification, or related work experience.

Where you will be working

Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies. There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life. A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.

Equal Opportunities

We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.

What's on Offer

• Salary, stock and performance related bonus


• Maternity/Paternity Leave


• Employee stock purchase scheme


• Matching pension scheme


• Education Assistance


• Relocation and immigration support (if needed)


• Life, Medical, Income and Travel Insurance


• Subsidised memberships for physical and mental well-being


• Bicycle purchase scheme


• Employee run clubs, including, running, football, chess, badminton + many more

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.


• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.


• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

If you would like more information about this role, please contact Qualcomm Careers.