EVA Design Verification Engineer, Senior - Cork, Ireland

Qualcomm

Cork

On-site

EUR 65,000 - 90,000

Full time

8 days ago

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Benefits offered by this job

Salary, stock and performance related
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support
Life, Medical, Income and Travel Insur
Subsidised memberships for physical/​m
Bicycle purchase scheme
Employee run clubs

Job summary

QT Technologies Ireland Limited is seeking a Verification Engineer to understand and verify multimedia designs, focusing on Computer Vision hardware IP and subsystems for SoCs in mobile applications.

You will work with architects, ASIC designers and SW engineers to plan verification strategies, develop testbenches in SystemVerilog/UVM, and contribute to test automation and documentation under supervision.

Qualifications

  • Master’s degree or above with 2+ years in ASIC design and verification.
  • Experience with test planning, debugging, and multimedia hardware verification.
  • Hands-on with SystemVerilog/UVM and coverage-driven verification.

Responsibilities

  • Architect and implement testbenches to verify multimedia IP.
  • Create and maintain SystemVerilog/UVM test environments.
  • Collaborate with Architecture, Software, Firmware, and Design teams to define test methodology and content.
  • Participate in micro-architecture reviews.
  • Develop automated CI/test content and support integration with IPs.
  • Write technical docs and feature descriptions for straightforward projects.

Skills

SystemVerilog
UVM
Verilog
C/C++
Python scripting
Tcl/Perl scripting

Education

Bachelor's degree in Science/Engineering
Master's degree in Science/Engineering
PhD in Science/Engineering

Tools

AMBA AXI/ABP/AXI
SystemVerilog testbench automation

Job description

Company

QT Technologies Ireland Limited

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

As a Verification Engineer, you will be responsible for understanding the expected functionality of multimedia designs, specifically Computer Vision hardware IP and subsystem. You will work with the architects of these multimedia systems, as well as multimedia ASIC designers and SW engineers to plan and execute verification and validation of multimedia subsystems for integration into SoCs for mobile applications.

Responsibilities
  • Applies knowledge and experience to architect, design, implement, the testbench to verify the structure and performance computer vision IPs
  • Creates and maintains verification test benches and environments in System Verilog/UVM
  • Collaborates with Architecture, Software, Firmware, Design, Modeling, Emulation and Post-silicon validation teams to define and develop test methodology and content
  • Participate in micro-architecture reviews
  • Collect, organize and execute various forms of system level test content including directed testcases, standards compliance test suites, and system level scenarios
  • Build automation for continue integration and testing based on latest IP
  • Works with team members to understand and align on narrow scope of feature development and meet targets.
  • Write technical documentation and feature descriptions for straightforward projects under the direction of a supervisor.
Qualifications
  • Master’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a closely related field
  • 2+ years of experience with ASIC design and verification tools, techniques, and methodology
  • Test planning, problem solving, debug, Verification of Multi-media hardware
  • Strong working knowledge of HVLs: System Verilog, OO programming. Verilog , C/C++, Tcl/Perl/python/shell-scripting
  • 2+ years of experience with developing block-level testbench environment using SystemVerilog. Strong experiences in coverage-driven constrained random verification is preferred.
  • 2+ years of experience with verification methodologies through coursework or past experiences such as UVM or OVM and exposure to Assertion based Formal Verification
  • 2+ years of experience with scripting/automation skills using either Perl or python
  • Experience with AMBA Bus protocol (AXI/AHB/APB etc) is desirable (not mandatory)
  • Knowledge or experience with Assertion Based Formal Verification is desirable (not mandatory)
  • Experience in formal verification is plus
Where you will be working

Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies.

There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life.

A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.

Equal Opportunities

We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.

What's On Offer

Apart from working in an open, relaxed and collaborative space, you will enjoy:

  • Salary, stock and performance related bonus
  • Maternity/Paternity Leave
  • Employee stock purchase scheme
  • Matching pension scheme
  • Education Assistance
  • Relocation and immigration support (if needed)
  • Life, Medical, Income and Travel Insurance
  • Subsidised memberships for physical and mental well-being
  • Bicycle purchase scheme
  • Employee run clubs, including, running, football, chess, badminton + many more
Minimum Qualifications
  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field.

  • References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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