Processor Researcher/Engineer

Huawei Hong Kong Research Center(HKRC)

Hong Kong

On-site

HKD 1,000,000 - 1,400,000

Full time

9 days ago
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Job summary

Huawei Hong Kong Research Center(HKRC) is seeking a PhD-level researcher to design and model CPU/NPU cores and associated accelerator architectures in Hong Kong. You will work on software-hardware co-design libraries and system-level optimization to advance scalable silicon solutions.

The role emphasizes high-performance design, verification, and collaboration with cross-disciplinary teams to push the boundaries of compute architectures and publish in top venues.

Qualifications

  • Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • Solid understanding of computer system architecture (including super-scalar and out-of-order execution).
  • Proficiency in tools/methods for logic synthesis, physical design, formal verification, DFT, or AI-driven optimization (e.g., ML for placement & routing).
  • Advanced C++/Python; familiarity with SystemC, TCL, AArch64 assembly, or ML frameworks (PyTorch/TensorFlow) is a plus.

Responsibilities

  • Take part in the design, modeling and development of CPU/ NPU core families.
  • Research and develop novel computer architectures to address compute challenges.
  • Design, model, and optimize methodologies for high-performance logic synthesis, physical design, verification, and AI-driven design-space exploration.
  • Develop libraries for software-hardware co-design and system-level optimization.
  • Collaborate with architecture, software, ASIC, and circuit design teams to define microarchitecture and translate research into scalable silicon solutions.
  • Define and implement coverage strategies, verification plans, and functional validation at RTL and system levels.
  • Perform trade-off analysis of hardware implementations for performance, power, and area.

Skills

Advanced C++/Python
AI-driven optimization
Architecture concepts

Education

Ph.D. in Electrical Engineering / Computer Engineering / Computer Science

Tools

SystemC
TCL
Verilog/SystemVerilog
ML frameworks (PyTorch/TensorFlow)

Job description

Responsibilities
  • Take part in the design, modeling and development of multiple families of CPU/ NPU cores. You will develop libraries for design-space exploration and software-hardware co-design.
  • Research and develop novel computer architectures (e.g., CPU/NPU/GPU/TPU cores, domain-specific accelerators, memory hierarchies, emerging interconnect technologies) to address cutting-edge compute challenge
  • Design, model, and optimize methodologies for high-performance logic synthesis, physical design, verification, and AI-driven design-space exploration.
  • Develop libraries for software-hardware co-design and system-level optimization.
  • Work with architecture, software, ASIC, and circuit design teams to define microarchitecture (e.g., memory systems, interconnects) and translate research insights into scalable silicon solutions.
  • Define and implement coverage strategies, verification plans, and functional validation at multiple levels (RTL, system).
  • Perform trade-off analysis of hardware implementations for performance, power, and area (PPA).
  • Publish research in top-tier conferences (e.g., ISCA, MICRO, DAC) and contribute to patent filings.
Qualifications
  • Ph.D. in in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • Solid understanding of computer system architecture (including aspects like super-scalar and out-of-order execution), multi-core/AI-core architectures, cache coherency, and emerging paradigms (e.g., neuromorphic/quantum systems).
  • Proficiency in tools/methods for logic synthesis, physical design, formal verification, DFT, or AI-driven optimization (e.g., ML for placement & routing).
  • Advanced C++/Python; familiarity with SystemC, TCL, AArch64 assembly, or ML frameworks (PyTorch/TensorFlow) is a plus.
Service Skills
  • Experience with RTL design (Verilog/System Verilog), architecture simulators (Gem5, SST), and ASIC toolchains.
  • Low-power/high-speed circuit design, complex RTL module development, or AI-driven architecture exploration will be bonus skills
  • Curiosity-driven, problem-solving oriented, and passionate about bridging theoretical research with real-world impact.
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