Verification Engineer

TN United Kingdom; Scotland; On-site; GBP 50,000 - 80,000; Full time

Job summary

An innovative global firm is looking for a skilled Verification Engineer to enhance their mixed-signal IC development team in Edinburgh. This senior role focuses on defining verification strategies and leading teams through complex projects, ensuring high-quality delivery for consumer products. The position offers a competitive salary package, including bonuses and RSUs, along with visa sponsorship and relocation assistance. Join a welcoming team of experts and contribute to cutting-edge technology in a dynamic environment.

Benefits

Competitive salary package

Bonuses

RSUs

Visa sponsorship

Relocation assistance

Qualifications

• Proven experience in verification of mixed-signal ASICs.
• Proficiency in SystemVerilog and SVA.

Responsibilities

• Define verification strategies for complex mixed-signal ICs.
• Lead verification teams through successful project delivery.

Skills

Verification of mixed-signal ASICs

SystemVerilog

SVA (SystemVerilog Assertions)

Functional and code coverage analysis

Excellent communication skills in English

Education

BSc / MSc in Electronic Engineering

Job description

Verification Engineer Position - Edinburgh

I am seeking an experienced Verification Engineer to join my award-winning global client based in Edinburgh.

The role focuses on mixed-signal IC development. As a Verification Engineer, you will be responsible for complex verification systems and improving verification methodologies, working on cutting-edge projects for consumer products. This senior position involves defining verification strategies for complex mixed-signal ICs and leading verification teams through to successful delivery.

Essential Requirements:

1. A University BSc / MSc degree in Electronic Engineering or a related field
2. Proven experience in verification of mixed-signal ASICs
3. Experience with directed and constrained random verification, including functional and code coverage analysis
4. Proficiency in SystemVerilog and SVA (SystemVerilog Assertions)
5. Excellent communication skills in English

You will be part of a welcoming team of mixed-signal IC design experts and will receive a competitive salary package, including bonuses and RSUs. Visa sponsorship and relocation assistance are provided.

If this role interests you, please contact Caroline Pye with your CV.