Staff Power Architect — System Design for PMICs

Renesas; City of Edinburgh; On-site; GBP 90,000 - 130,000; Full time

Job summary

Renesas is seeking a Staff Power Architect – System Design to lead architecture definition and modeling for PMIC and advanced DC/DC converter products. You will partner with analog, digital, and verification teams to ensure architecture intent is realized across multiple programs.

You will own system-level architecture, drive trade-offs, and provide leadership during silicon validation and debug activities, leveraging tools like Simplis and Simulink to reduce risk and improve execution.

Qualifications

• Strong experience in PMICs, DC/DC converters, or mixed-signal power systems.
• Experience with architecture definition and architectural analysis for power management products.
• Familiarity with modeling tools such as Simplis and Simulink.
• Ability to work across disciplines and influence technical decisions through collaboration and credibility.
• Strong written and verbal communication skills for technical documentation and reviews.

Responsibilities

• Define and own architectures for PMIC and advanced power converter products across multiple programs.
• Drive architecture trade-offs and define operating modes, startup/shutdown sequencing, and system boundary conditions.
• Lead architecture reviews and ensure transition from architecture to design execution.
• Provide architectural leadership for system-level design decisions across projects.
• Develop and maintain low- and system-level models to support architecture decisions and risk reduction.

Skills

PMICs

DC/DC converters

Architectural analysis

Cross-functional collaboration

Technical leadership

Tools

Simplis

Simulink

Job description

Renesas is seeking a Staff Power Architect – System Design to lead architecture definition and modeling for PMIC and advanced DC/DC converter products. You will partner with analog, digital, and verification teams to ensure architecture intent is realized across multiple programs.

You will own system-level architecture, drive trade-offs, and provide leadership during silicon validation and debug activities, leveraging tools like Simplis and Simulink to reduce risk and improve execution.