SoC Verification Engineer

ARM LIMITED; Cambridge; On-site; GBP 74,000 - 100,000; Full time

Job summary

ARM LIMITED in Cambridge is seeking a dedicated SoC engineer to help develop processing systems used in IoT, Automotive, and infrastructure computing. You will work on subsystems, RTL, IP interfaces, and microarchitecture specifications, while refining design methodologies and supporting project plans.

The role emphasizes Verilog/SystemVerilog, ARM architecture familiarity, and collaboration with performance teams to optimize power and performance across diverse IPs and subsystems.

Qualifications

• Bachelor's or Master's degree in Electrical/Computer Engineering or a related field, or equivalent experience.
• Experience in digital hardware design and Verilog HDL.
• Detailed understanding of current methods and techniques for complex SoC development.
• Experience in static design checks, including CDC, RDC, X-prop, lint.
• Experience creating design specifications.
• Proficiency in Perl, Python or other scripting languages.
• Strong delivery record of sophisticated RTL subsystems in reasonable timescales.
• Ability to navigate and make high-level PPA trade-offs and articulate the rationale for those choices.
• Experience with synthesis and timing analysis and power management techniques.
• Good communication and collaboration skills.
• Experience with ARM-based designs and/or ARM System Architectures.
• Knowledge of memory system interconnect protocols (e.g., AMBA ACE-Lite or AXI).
• Familiarity with one or more of processor subsystems, NoCs, security subsystems, PCIe subsystems, system power management flows.
• Experience with SystemVerilog and verification methodologies.

Responsibilities

• Understand incoming IPs, their functionality, interfaces and interwork with subsystem/SoC components.
• Develop subsystem microarchitecture specifications and RTL.
• Propose refinements to IP teams based on system-level integration and usage.
• Run design checks and fix bugs; review verification plans and debug issues.
• Collaborate with performance analysis to evaluate and improve system performance.
• Guide and support teammates to enable project completion while balancing plans with PM.

Skills

Verilog HDL

Digital hardware design

Static design checks

Design specifications

Perl

Python

RTL subsystems

PPA trade-offs

Synthesis & timing analysis

Power management techniques

Communication & collaboration

ARM System Architectures

AMBA ACE-Lite / AXI

NoCs / PCIe / system power management

SystemVerilog & verification

Education

Bachelor's or Master's in Electrical/Computer Engineering

Job description

Job Overview Are you an RTL engineer eager to build expertise across multiple IP products? Do you want to work globally with internal teams to develop systems optimized for performance and power? If so, we want to speak with you! We're seeking a hard-working, creative, and motivated SoC engineer to join the team developing sophisticated processing systems used in IoT, Automotive, and Infrastructure computing. Responsibilities As a creative design engineer with knowledge of subsystems and SoCs you will be part of a team integrating IPs and developing logic for subsystems. You will need to understand and review the subsystem architecture, develop the microarchitecture specifications, review verification test plans, help debug and fix issues, and work with the performance analysis team to evaluate and improve system performance. Your key responsibilities include understanding incoming IPs, their functionality, interfaces, and interworking with various subsystem and SoC components; developing subsystem microarchitecture specifications and RTL; proposing refinements to IP teams based on system-level integration and usage; running various design checks and fixing bugs. You will identify areas of improvement and enhance the design methodologies used by the team and the wider organization, and guide and support other members as needed to enable successful completion of project activities while balancing tasks including working with Project Management on drawing-up and managing plans and schedules. Required Skills And Experience

• Bachelor's or Master's degree in Electrical/Computer Engineering or a related field, or equivalent experience.
• Experience in digital hardware design and Verilog HDL.
• Detailed understanding of current methods and techniques for complex SoC development.
• Experience in static design checks, including CDC, RDC, X-prop, lint.
• Experience creating design specifications.
• Proficiency in Perl, Python or other scripting languages.
• Strong delivery record of sophisticated RTL subsystems in reasonable timescales.
• Ability to navigate and make high-level PPA trade-offs and articulate the rationale for those choices.
• Experience with synthesis and timing analysis and power management techniques.
• Good communication and collaboration skills.

Preferred Skills and Experience

• Experience with ARM-based designs and/or ARM System Architectures.
• Knowledge of memory system interconnect protocols (e.g., AMBA ACE-Lite or AXI).
• Familiarity with one or more of processor subsystems, NoCs, security subsystems, PCIe subsystems, system power management flows.
• Experience with SystemVerilog and verification methodologies.

Additional Information Please note that no relocation package is available for this role. If skilled worker sponsorship is required, Arm will meet costs associated with sponsorship for the employer only. All fees associated with the individual's application (e.g., visa application fee and Immigration Health Surcharge) will be the responsibility of the successful candidate. Equal Opportunities Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and we don't discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Salary Range Salary Range: £73,500 - £99,500 per year

• Bachelor's or Master's degree in Electrical/Computer Engineering or a related field, or equivalent experience.
• Experience in digital hardware design and Verilog HDL.
• Detailed understanding of current methods and techniques for complex SoC development.
• Experience in static design checks, including CDC, RDC, X-prop, lint.
• Experience creating design specifications.
• Proficiency in Perl, Python or other scripting languages.
• Strong delivery record of sophisticated RTL subsystems in reasonable timescales.
• Ability to navigate and make high-level PPA trade-offs and articulate the rationale for those choices.
• Experience with synthesis and timing analysis and power management techniques.
• Good communication and collaboration skills.
• Experience with ARM-based designs and/or ARM System Architectures.
• Knowledge of memory system interconnect protocols (e.g., AMBA ACE-Lite or AXI).
• Familiarity with one or more of processor subsystems, NoCs, security subsystems, PCIe subsystems, system power management flows.
• Experience with SystemVerilog and verification methodologies.