SoC ASIC/FPGA Design Engineer - RTL, C/C++, Python

Edison Smart®; Cambridge; On-site; GBP 50,000 - 70,000; Full time

Job summary

A technology company in Cambridge is seeking an ASIC Hardware Engineer to join their advanced semiconductor team. The ideal candidate will have a strong background in ASIC and/or FPGA design, along with programming experience in C/C++ and Python. Candidates should be knowledgeable about GPU, CPU, DSP, or FPU architectures. This role promises an exciting opportunity for career advancement within a leading organization focused on cutting-edge technologies.

Qualifications

• Strong background in ASIC and/or FPGA design.
• Experience in RTL design at SoC level.
• Programming experience in C/C++ and Python.
• Knowledge of GPU, CPU, DSP, or FPU architectures.

Skills

ASIC design

FPGA design

RTL design

C/C++ programming

Python programming

GPU architecture knowledge

CPU architecture knowledge

DSP architecture knowledge

FPU architecture knowledge

Job description

A technology company in Cambridge is seeking an ASIC Hardware Engineer to join their advanced semiconductor team. The ideal candidate will have a strong background in ASIC and/or FPGA design, along with programming experience in C/C++ and Python. Candidates should be knowledgeable about GPU, CPU, DSP, or FPU architectures. This role promises an exciting opportunity for career advancement within a leading organization focused on cutting-edge technologies.