Senior Verification Engineer

Arm Limited; Cambridge; On-site; GBP 50,000 - 90,000; Full time

Job summary

This innovative firm is seeking a Staff Engineer with expertise in RTL design for ASIC products and SoCs. The role involves writing specifications, developing RTL, and collaborating with verification teams to debug design issues. You'll also mentor team members and contribute to enhancing design methodologies. With a competitive reward package that includes bonuses and healthcare support, this opportunity offers a chance to work on cutting-edge technology in a dynamic environment, making a significant impact on product delivery and design efficiency.

Benefits

Annual bonus

Healthcare support

Supplementary pension

25 days annual leave

Option to buy additional leave

Qualifications

• In-depth understanding of low-power and high-speed design techniques.
• Experience with RTL design for complex ASIC products and SoCs.

Responsibilities

• Write micro-architecture specifications and develop RTL.
• Guide and support team members for project completion.

Skills

RTL design for ASIC products

Verilog/SystemVerilog

Arm-based designs

Functional Safety concepts

Static design checks

Power management techniques

Technical team leadership

Shell programming/scripting

Job description

Responsibilities:

Design engineers are required to have in-depth understanding across all the elements that contribute to the products’ successful delivery. This includes low-power and high-speed design techniques and the ability to produce designs that are area efficient. Your key responsibilities will include writing micro-architecture specifications, developing the RTL and running various design checks. Additionally, you will work with the verification team to review test plans and help debug design issues. As a Staff engineer, you will also guide and support other members of the team as needed to enable the successful completion of project activities and contribute to developing and improving the design methodologies used by the team.

Required Skills and Experience:

1. Experience of RTL design for complex ASIC products & SoCs using Verilog and/or SystemVerilog
2. Experience with Arm-based designs and/or Arm System Architectures
3. Knowledge or experience with Functional Safety concepts and standards (e.g., ISO 26262, IEC 61508). Should have worked on an Automotive IP or SoC from definition to completion.
4. Experience or knowledge in the following areas: Static design checks, Synthesis and timing analysis, Power management techniques
5. Power domain and Clock Domain Crossing implementation
6. An understanding of the fundamentals of computer architecture and systems and practical experience of working on Processor based system designs
7. Technical team leadership, mentoring or coaching experience.
8. Knowledge of shell programming/scripting (e.g. Tcl Perl, Python etc.)

“Nice To Have” Skills and Experience:

1. High level programming experience such as C/C++ and/or assembly language programming
2. Experience in embedded operating systems, device drivers, microprocessor, and embedded system hardware architectures.
3. Knowledge or experience of performing DFMEA, DFA at the module and system level.

In Return:

We offer a competitive reward package including annual bonus, healthcare and wellness support. As well as other benefits such as a supplementary pension, and 25 days annual leave (with option to buy an additional 5 days per year)