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Senior IP / SoC Verification Engineer

arm limited

Cambridge

On-site

GBP 50,000 - 75,000

Full time

2 days ago
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Job summary

A leading company in semiconductor technology is seeking enthusiastic SoC Verification Engineers in Cambridge. The ideal candidate will verify high-performance safety subsystems, engage in project management, and contribute to verification methodology improvements, while benefiting from competitive healthcare and annual leave.

Benefits

Healthcare
Wellness support
Supplementary pension
25 days annual leave
Option to buy additional 5 days

Qualifications

  • 5-10 years of experience in Automotive Functional Safety Verification.
  • Hands-on experience with HDLs: Verilog, SystemVerilog.
  • Understanding of processor architectures fundamentals.

Responsibilities

  • Verify the functional correctness of compute subsystems.
  • Craft test plans, develop SystemVerilog/Verilog testbenches, and debug test failures.
  • Engage in project management activities, planning, and supporting junior team members.

Skills

Automotive Functional Safety Verification
Verilog
SystemVerilog
C/C++
UVM

Job description

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Client:

arm limited

Location:

Cambridge, United Kingdom

Job Category:

Other

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EU work permit required:

Yes

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Job Reference:

6ca05ceadcb7

Job Views:

15

Posted:

22.06.2025

Expiry Date:

06.08.2025

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Job Description:

The Role

Job Description:

Arm’s Systems Development team creates high-performance and safety subsystems for various applications, utilizing the latest IP products from Arm and other vendors. We are seeking creative and enthusiastic SoC Verification Engineers to verify these systems.

Responsibilities:

As a verification engineer with knowledge of subsystems and SoCs, you will verify the functional correctness of compute subsystems. You will collaborate with the project team to understand and review subsystem architecture and design specifications, and develop a functional verification strategy.

Your main tasks will include crafting test plans, developing SystemVerilog/Verilog testbenches and tests, debugging test failures, and contributing to verification methodology improvements. You will also work closely with other teams on design microarchitecture, verification methodologies, and system performance.

You will also engage in project management activities, planning, scheduling, and supporting junior team members.

Required Skills and Experience:

  • 5-10 years of experience in Automotive Functional Safety Verification
  • Hands-on experience with HDLs such as Verilog, SystemVerilog, and coding test cases
  • Experience with fault injection tools and methodologies (e.g., Z01X)
  • Experience developing test cases from Safety Requirements
  • Understanding of processor architectures fundamentals
  • Coding in C/C++ and assembly language, preferably Arm ISA, for functional coverage
  • Exposure to UVM or other industry-standard verification methodologies

Nice To Have Skills and Experience:

  • Knowledge of ISO 26262 standard
  • Understanding of Failure Mode Analysis and Safety Mechanisms
  • Experience with Formal Verification and Hardware Emulation
  • Experience in safety analysis such as FMEA, FTA, DFA per ISO 26262
  • Experience with Fault injection methodologies on emulators

In Return:

We offer a competitive package including healthcare, wellness support, a supplementary pension, and 25 days of annual leave (with an option to buy 5 additional days).

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