Senior Staff Digital Design Engineer

Qualcomm; Cambridge; On-site; GBP 60,000 - 100,000; Full time

Job summary

An established industry player seeks a highly skilled engineer to join their dynamic team in Cambridge. This role involves leading the design and delivery of innovative digital IP blocks for cutting-edge products in the wireless audio market. The ideal candidate will have extensive experience in ASIC design and a proven track record of mentoring teams to achieve excellence. Join a forward-thinking company that values creativity and collaboration, and make a significant impact in transforming how the world connects and communicates. This is a fantastic opportunity for those passionate about technology and innovation.

Qualifications

• 6+ years of ASIC design, verification, and validation experience.
• Deep understanding of digital design principles and methodologies.
• Experience in SoC design and IP integration.

Responsibilities

• Lead teams to deliver complex IP designs from concept to post-silicon.
• Develop project plans with timelines and milestones.
• Mentor junior engineers and foster collaboration.

Skills

ASIC design

Verilog/System-Verilog

Digital design principles

Power optimization

Scripting skills (Linux, TCL, Perl/Python)

Education

Bachelor's degree in Science or Engineering

Master's degree in Science or Engineering

PhD in Science or Engineering

Tools

Linux

TCL

Perl

Python

Job description

Company:

Qualcomm Technologies International Ltd

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Qualcomm invents breakthrough technologies that transform how the world computes, connects, and communicates. Today, our inventions are the foundation for life-changing products, experiences, and industries.

Qualcomm’s Voice and Music Business Unit is a leading player in wireless earbud, headset, and smart speaker market. Together we deliver hardware, software and applications that bring together the very latest wireless and audio technologies to create ground-breaking products.

We are seeking a highly skilled and experienced engineer to join our dynamic team in our Cambridge office. The ideal candidate will have a deep understanding of digital design and a proven track record in leading teams to deliver high-quality designs and meet product schedules. This role demands exceptional technical expertise, leadership qualities, and a commitment to excellence.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Key Responsibilities:

• In partnership with system and architecture teams, drive the specification, development and delivery of digital IP blocks to multiple projects.
• Drive team-level performance, ensuring alignment with adjacent teams, project goals and schedules.
• Develop detailed project plans, including timelines, milestones, and deliverables.
• Mentor and guide junior engineers, fostering a collaborative and innovative environment.
• Facilitate effective communication and coordination within the team and across departments.
• Define high level specifications and micro-architecture for low power IPs.
• Ensure design quality, RTL acceptance checks, performance and verification closure.
• Support synthesis and timing closure, including creation of functional ECOs.
• Support post-silicon bring-up activities.

Required Competencies:

• Proven ability to lead teams to deliver complex IP designs, from concept to post-silicon debug.
• Deep understanding of digital design principles, methodologies and tools.
• Detail oriented with strong organizational, excellent communication and interpersonal skills.
• Excellent problem-solving skills and attention to detail.
• Experience in Verilog/System-Verilog is a must.
• Knowledge and experience with power analysis at RTL and Gate-Level.
• Experience of CPU or DSP based design, SoC level design and IP Integration Experience.
• Experience of System C design and High-Level Synthesis flows is desirable.
• Proactive, creative, curious, motivated to learn and contribute with good collaboration skills.

What are we looking for?

• 12+ yrs. industry experience.
• Track record in delivering low-power digital design from concept to post-silicon support.
• Experience in SoC design, network-on-chip, design for debug, power optimization, standard networking protocols (e.g. AHB, AXI, I2C, UART)
• Experience delivering designs with multiple clock and power domains.
• Scripting skills on Linux, TCL and Perl/Python.
• Positive attitude, bringing a fun-loving attitude and passion for inclusively solving problems.

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may [e-mail] call Qualcomm's toll-free number foundhere. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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