Senior IP Verification Engineer – SystemVerilog/UVM Lead

ARM LIMITED; Saffron Walden; Hybrid; GBP 70,000 - 100,000; Full time

Benefits offered by this job

Hybrid working

Job summary

ARM LIMITED in the United Kingdom is seeking an IP Verification Engineer to join the SoC Management IP team. You will develop verification plans, build UVM-based environments, drive coverage, and debug complex simulations, collaborating with architects and verification engineers to deliver high-quality IP across Arm-based systems.

The role requires strong SystemVerilog/UVM experience, constrained-random verification, scripting (Python/Perl), and excellent communication.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Strong RTL verification experience and knowledge of constrained-random verification.
• Proficiency in SystemVerilog and familiarity with UVM or similar methodologies.
• Experience writing test plans, developing testbenches, and driving coverage closure.
• Good debugging and problem-solving skills in complex simulation environments.
• Understanding of verification fundamentals including functional coverage and assertions.
• Experience with scripting languages (Python, Perl) for automation.
• Strong communication skills and ability to work effectively within a team.

Responsibilities

• Develop and own verification plans for IP blocks based on architecture and build specifications.
• Build and implement SystemVerilog/UVM-based verification environments, including testbenches, stimulus, and checkers.
• Define functional and code coverage goals and drive coverage closure.
• Debug RTL and verification issues, working closely with build and architecture teams to resolve problems.
• Complete regression testing and analyze failures to root cause.
• Support the advancement and refinement of verification methodologies and infrastructure.
• Participate in building and verification reviews, providing feedback to improve build quality and verifiability.
• Collaborate with teams across Arm to ensure delivery of high-quality IP.

Skills

RTL verification

SystemVerilog

UVM

Constrained-random verification

Python scripting

Debugging

Functional coverage

Team collaboration

Education

Bachelor's or Master's degree in Electrical/Computer Engineering or Computer Science

Tools

UVM

AMBA protocol knowledge

Job description

ARM LIMITED in the United Kingdom is seeking an IP Verification Engineer to join the SoC Management IP team. You will develop verification plans, build UVM-based environments, drive coverage, and debug complex simulations, collaborating with architects and verification engineers to deliver high-quality IP across Arm-based systems.

The role requires strong SystemVerilog/UVM experience, constrained-random verification, scripting (Python/Perl), and excellent communication.