Senior GPU Top Design Engineer: Micro-Architecture & RTL

Apple, Inc.; Cambridge; On-site; GBP 90,000 - 120,000; Full time

Job summary

Apple is seeking a highly skilled engineer for its UK GPU Design Centre in Cambridge. You will develop micro-architecture and RTL for critical top-level IP, while collaborating with architecture, verification and physical design teams to meet performance, features, timing, area and power goals.

Responsibilities include RTL design, clocking, CDC/RDC verification, and mentoring junior engineers. The role requires expertise in SystemVerilog/VHDL and proficiency with revision control systems, with

Qualifications

• Expertise in SystemVerilog and VHDL.
• Experience with revision control systems.

Responsibilities

• Micro-architecture development for owned IP and system-level improvements.
• IP design and synthesis for owned blocks.
• Design clocking and reset distribution, CDC/RDC verification.
• Contribute to GPU top-level assembly/integration.
• Debug and analyse top-level design issues.
• Code line management, supporting multiple products and chips.
• Review RTL implementation and mentor junior engineers.

Skills

SystemVerilog

VHDL

Revision control

Tools

Git

Job description

Apple is seeking a highly skilled engineer for its UK GPU Design Centre in Cambridge. You will develop micro-architecture and RTL for critical top-level IP, while collaborating with architecture, verification and physical design teams to meet performance, features, timing, area and power goals.

Responsibilities include RTL design, clocking, CDC/RDC verification, and mentoring junior engineers. The role requires expertise in SystemVerilog/VHDL and proficiency with revision control systems, with