Senior Functional-Safety Verification Engineer

Arm; Cambridge; Hybrid; GBP 74,000 - 100,000; Full time

Job summary

Arm is seeking a Senior/Staff Safety Verification Engineer to join our engineering team to verify safety-critical hardware designs and safety mechanisms. You will develop verification strategies focusing on functional safety and lead to safety certification of the product, collaborating with design, architecture, and functional-safety teams to show compliance with ISO 26262 and IEC 61508.

Responsibilities include building verification environments, developing constrained-random testbenches, and

Qualifications

• 5+ years of IP, subsystem, or SoC verification experience.
• Strong proficiency in SystemVerilog, Verilog, and C/C++.
• Experience with UVM or other verification methodologies.
• Experience developing constrained-random verification environments and reusable components.
• Experience in SoC verification and test development using C/C++.
• Familiarity with ISO 26262 and IEC 61508 functional-safety concepts.
• Proficiency in scripting languages such as Python or Perl.
• Strong debugging, analytical, and problem-solving skills.
• Excellent interpersonal and cross-team communication abilities.

Responsibilities

• Collaborate with RTL designers and architects to understand specifications and microarchitecture details.
• Develop and execute verification plans for functional-safety requirements and safety mechanisms at IP, subsystem, and/or SoC levels.
• Develop and maintain verification environments, testbenches, assertions, checkers, and coverage models using SystemVerilog/UVM.
• Debug simulation failures and identify root causes with design engineers to resolve issues.
• Trace safety requirements to verification activities and provide evidence of verification completeness.
• Contribute to safety documentation and ISO 26262 / IEC 61508 work products.
• Support reviews of safety requirements, safety mechanisms, and verification results.
• Contribute to automation and continuous improvement of regression, coverage-analysis, and reporting flows.

Skills

SystemVerilog

Verilog

C/C++

UVM

Constrained-random verification

SoC verification

Python

Debugging

Communication

Education

Bachelor's or Master's in Electronics, Electrical, or Computer Engineering

Tools

Arm-based designs

AMBA protocols (AXI/AHB/APB)

Job description

Arm is seeking a Senior/Staff Safety Verification Engineer to join our engineering team to verify safety-critical hardware designs and safety mechanisms. You will develop verification strategies focusing on functional safety and lead to safety certification of the product, collaborating with design, architecture, and functional-safety teams to show compliance with ISO 26262 and IEC 61508.

Responsibilities include building verification environments, developing constrained-random testbenches, and