Electronic FPGA Engineer

CamWebDir; United Kingdom; Remote; GBP 65,000 - 90,000; Full time

Job summary

HUBER+SUHNER Polatis is seeking an experienced FPGA engineer to design and verify VHDL-based logic for Artix-7 FPGAs using Vivado. You will develop deterministic FSMs, implement and validate low-level interfaces (I2C, SPI, UART), and drive tests from board bring-up to production readiness.

The role emphasizes hardware verification, timing closure, documentation, and cross-functional collaboration with electronics and software teams.

Qualifications

• VHDL for FPGA design and verification required.

Responsibilities

• Design and implement FPGA logic in VHDL for FPGA devices with Artix-7 and Vivado.
• Develop finite state machines to control hardware interfaces and protocols.
• Create low-level driver logic for I2C and SPI, including initialisation and error handling.
• Write and maintain test benches and perform functional/timing simulations.
• Perform hardware bring-up, lab testing, and iterative debugging with timing constraints.
• Manage constraints (XDC), clocking, resets and CDC analysis; achieve timing closure.
• Contribute to requirements capture, architecture design, module specs, and DFT/DFM considerations.
• Maintain configuration management (SVN) and traceability to requirements.
• Produce design documentation: descriptions, interfaces, test procedures, change logs.
• Participate in design/code reviews and support system integration and field teams.
• Support FPGA flow improvements and test automation (Tcl/Python).

Skills

VHDL

Xilinx Artix-7

Vivado

Finite State Machines

I2C

SPI

UART

Test Benches

Timing Closure

XDC

CDC

SVN

Tcl

Python

PCB knowledge

Documentation

Education

Electronic/Electrical Engineering degree

Computer Engineering degree

Tools

Vivado

SVN

Tcl

Python

Job description

• Design & implement FPGA logic in VHDL for Xilinx Artix-7 devices using Vivado, adhering to coding standards and design reviews.


• Develop finite state machines to control and sequence hardware interfaces and protocols reliably.


• Create low-level driver logic for I²C, SPI (and other simple serial interfaces), including initialisation, transaction handling, and error conditions.


• Write and maintain test benches (self-checking where practical), conduct functional and timing simulations, and document verification results.


• Perform hardware bring-up and validation, including lab testing, measurements, and iterative debug; collaborate on board-level constraints and interface timing.


• Manage constraints (XDC), clocking, resets, and CDC analysis; achieve timing closure and generate production-ready bitstreams.


• Contribute to requirements capture, architecture design, module specifications, and DFT/DFM considerations for FPGA-based systems.


• Maintain configuration management (SVN), branching/release processes, and traceability to requirements.


• Produce and maintain technical documentation: design descriptions, registers/interfaces, test procedures, and change logs.


• Participate in design and code reviews, support system integration, and assist production/field teams with issue triage.


• Support continuous improvement of FPGA design flows, test coverage, and automation (e.g., Tcl/Python scripts).

Your profile

• Degree or equivalent experience in Electronic/Electrical Engineering, Computer Engineering, or related discipline.


• Strong hands-on experience with VHDL for FPGA design and verification.


• Proven experience targeting Xilinx Artix-7 families; confident using Vivado (project setup, constraints, synthesis, place & route, timing closure, bitstream generation).


• Ability to design deterministic finite state machines (FSMs) for control/driver logic.


• Experience implementing and validating low-level embedded interfaces: I²C, SPI, UART (desirable), including bus arbitration, timing, and protocol edge cases.


• Competence in writing self-checking test benches and performing simulation (e.g., using Vivado simulator).


• Experience testing on hardware: bringing up boards, using logic analysers/oscilloscopes, debugging timing/constraint issues, and validating firmware in-system.


• Understanding of timing constraints (XDC), clock domain crossing (CDC), metastability, resets, and synchronous design best practices.


• Familiarity with version control (e.g., SVN).


• Optional but beneficial: knowledge of PCB-level considerations, signal integrity, and simple scripting (Tcl/Python) to automate flows.


• Typically 3+ years in FPGA development within a product or R&D environment (or demonstrable equivalent).
  Track record of delivering FPGA features/modules from requirements through to validated hardware.


• Experience collaborating with electronics engineers and embedded software engineers for system integration.


• Clear communicator with strong documentation habits (design specs, interface descriptions, test plans, release notes).


• Methodical problem-solver with attention to detail; able to work independently and in cross-functional teams.


• Ownership mindset with a focus on reliability, maintainability, and testability.

Why HUBER+SUHNER Polatis?

Our aim is to be the employer of choice and as such you can be assured of a market leading remuneration package that matches your skills and experience.

Your employment and development is at the heart of our \"Fundamentals\".

We have an entrepreneurial and collaborative culture within the business.