Senior FPGA Engineer

TN United Kingdom; Watford; Hybrid; GBP 50,000 - 80,000; Full time

Job summary

An exciting opportunity awaits for a skilled FPGA Design Engineer to join a high-tech communications firm. This role promises diverse challenges in FPGA design and development, where no two days are alike. You will work in a cutting-edge environment, developing modules and testing equipment while mentoring junior engineers. With a focus on continuous improvement and innovation, this position offers a pathway for career growth. If you're passionate about technology and eager to make a significant impact, this is the role for you!

Benefits

Flexible working

24 days annual leave

Company Pension Scheme

BUPA Healthcare

On-site parking

Bonuses

Qualifications

• In-depth knowledge of FPGA design and development.
• Experience in producing HDL code for digital systems.

Responsibilities

• Design and develop modules for digital IF systems.
• Integrate and test digital equipment and produce HDL code.

Skills

FPGA Design

HDL Coding

Linux Expertise

TCL Scripting

Verilog

Digital IF Design

Education

Bachelor's Degree in Electrical Engineering

Master's Degree in Electronics

Tools

Linux

VITA-49

Job description

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Remote – 1 day a month in office

Opportunity Overview

A new and exciting opportunity has arisen for a FPGA Design Engineer to join a high-tech communications company that prides itself on quality.

As an FPGA Design Engineer, no two days are the same. The role offers career development within a first-class high-tech environment.

Benefits

• Flexible working
• 24 days annual leave
• Company Pension Scheme
• BUPA Healthcare
• On-site parking
• Bonuses

Role & Responsibilities

The position involves a wide variety of FPGA design tasks supporting system design. This is a specialist role requiring in-depth knowledge of FPGA design.

Key Duties

1. Design and develop modules and equipment for digital IF.
2. Integrate and test digital IF equipment.
3. Produce HDL code for VITA-49 or similar network SDR transport protocols.
4. Utilize Linux as an expert user.
5. Scripting in TCL, utilizing IP Cores for rapid development.
6. Develop scripting to support continuous integration.
7. Design and develop test benches to validate Verilog code.
8. Conduct floor-planning and timing analysis to achieve timing closure.
9. Test HDL code on target platforms.
10. Integrate firmware into application design.
11. Coach and mentor junior engineers.