Senior FPGA Design Engineer — End-to-End Hardware Impact

Morgan McKinley; England; On-site; GBP 70,000 - 110,000; Full time

Benefits offered by this job

10% Company Pension

Private Medical (Optical & Dental)

Cycle to work scheme

Free On-site Parking

Job summary

Morgan McKinley partners with a globally established technology business focused on high-precision spatial sensing and real-time data platforms. We seek a Senior FPGA Design Engineer to lead hardware development from concept through manufacturing, collaborating with electronics, mechanical and software teams.

You will design and verify FPGA code for high-speed cameras and networking equipment, ensuring timing closure and regulatory compliance with thorough test coverage.

Qualifications

• Strong experience in VHDL (Verilog is a plus).
• Essential experience in compilation timing closure.
• Working knowledge of interface standards (LVDS, PCIe, GMII, etc.).
• Skilled in testbench generation and verification.
• Competent with version control systems (Git, SVN).

Responsibilities

• Design and verify FPGA code for high-speed cameras, calibration devices, and networking equipment.
• Ensure FPGA designs achieve timing closure and functional performance.
• Perform code reviews of existing and new VHDL/Verilog files.
• Ensure designs meet regulatory compliance and have appropriate test coverage for manufacturing.

Skills

VHDL

Verilog

Timing closure

Interface standards

Testbench generation

Version control

Education

Degree in Electronic Engineering

Tools

Git

SVN

Job description

Morgan McKinley partners with a globally established technology business focused on high-precision spatial sensing and real-time data platforms. We seek a Senior FPGA Design Engineer to lead hardware development from concept through manufacturing, collaborating with electronics, mechanical and software teams.

You will design and verify FPGA code for high-speed cameras and networking equipment, ensuring timing closure and regulatory compliance with thorough test coverage.