Senior Engineer

eTeam; Farnborough; On-site; GBP 70,000 - 95,000; Full time

Job summary

eTeam is seeking a Senior RF verification engineer in Farnborough to verify full Tx/Rx chains. You will set up and debug simulation testbenches, review block specifications, and report compliance to the design specs.

The role requires strong experience in RF/analog verification and proficiency in Verilog and SystemVerilog. You will interact with the chip lead to integrate designs and present the verification results in block-level reviews, while driving root-cause analysis for any specification

Qualifications

• 5+ years of experience in verification of RF Tx/Rx systems.
• Strong experience in simulation-based verification of RF, analog, and communication designs.
• Hands-on expertise in developing, debugging, and maintaining simulation testbenches.
• Proven ability to analyze, troubleshoot, and resolve verification issues via root cause analysis.
• Experience validating design compliance against specifications and preparing verification/compliance reports.

Responsibilities

• Review block specifications.
• Run simulations and report compliance to specifications.
• Perform root cause analysis of specification failures.
• Liaise with the chip lead to integrate designs.
• Present designs for block-level reviews.

Skills

RF verification

Verilog

SystemVerilog

Simulation testbenches

Root cause analysis

Job description

The senior engineer will take on the verification of full Rx and Tx chains of an on-going design. They will help setup and debug simulation testbenches, report compliance to spec and validate device register controls for test. The tasks will include:

The tasks will include:

• Review of block specifications.
• Simulation and reporting compliance to specifications.
• Root cause any specification failures.
• Liaising with the chip lead to integrate the designs.
• Presentation of design for block-level reviews.

5+ years of experience in verification of RF transmitter/receiver (Tx/Rx) systems. Strong experience in simulation-based verification of RF, analog, and communication designs. Hands-on expertise in developing, debugging, and maintaining simulation testbenches. Proven ability to analyze, troubleshoot, and resolve verification issues through root cause analysis. Experience in validating design compliance against specifications and preparing verification/compliance reports. Proficient in Verilog and SystemVerilog.