RFIC Design Engineer

eTeam Workforce Limited; Farnborough; On-site; GBP 60,000 - 90,000; Full time

Job summary

The RFIC Design Engineer role in Farnborough, UK is a senior, onsite position on a full-time contract that runs until 29/01/2027. You will lead debug and verification tasks across the Rx chain, confirm compliance to specifications, and validate device register controls for testing.

Responsibilities include schematic design and layout oversight, post-layout simulations, and documentation of calibrations. You will collaborate with the technical lead for integration and present findings during

Qualifications

• 5+ years RFIC experience
• Cadence and Spectre RF tools
• CMOS IC design expertise
• Nice to have verification experience

Responsibilities

• Review block specifications and ensure designs meet the required performance
• Perform schematic design, simulation and report compliance to specifications
• Oversee a layout engineer to complete the layout
• Conduct post-layout parasitic simulations and apply necessary adjustments
• Document usage and calibrations as needed
• Liaise with the technical lead to integrate designs
• Present designs for block-level reviews
• Complete top level verification simulations
• Report compliance to specifications
• Validate device register control settings for test

Skills

RFIC design experience

CMOS IC design

Verification

Tools

Cadence

Spectre RF

Job description

Job Title: RFIC Design Engineer
Location: Farnborough, UK
Job Type: Full-time contract, 29/01/2027
work Model: Onsite

Summary:

The senior engineer will take on the debug and verification of designs by performing full Rx chain verification simulations, reporting compliance to spec and validating device register controls for test.

Tasks will include:

• Review of block specifications.
• Schematic design, simulation and reporting compliance to specifications.
• Overseeing a layout engineer to complete the layout.
• Post-layout parasitic simulation and necessary adjustments.
• Documentation of usage and any calibrations etc.
• Liaising with the relevant technical lead to integrate the designs.
• Presentation of design for block-level reviews.
• Completing top level verification simulations
• o Reporting compliance to spec
• o Validating device register control settings for test

Key Responsibilities:

• Acts as a key contributor in a complex environment.
• Responsible for the delivering the fully verified blocks.
• Solves complex problems in a tightly constrained environment.
• Fully competent in Analogue design for complex sub-cells and small subsystems.
• Keeps abreast of new developments and is technical expert in the design of analogue sub-cells.
• Ensures quality of the solution; works with macro lead to ensure timely delivery of subsystems.

Technical Skills:

Must Have

• 5+ year of RFIC work experience
• Cadence
• CMOS IC Design
• Spectre RF

Nice To Have:

Verification