Senior DSP Firmware Engineer

Practicus; Harwell, Manchester, Stevenage; On-site; GBP 64,575 - 101,475; Full time

Job summary

Practicus is seeking an experienced DSP Firmware Engineer to join a leading space sector organisation. The role covers the full FPGA development lifecycle—from requirements capture and architectural design to implementation, verification and hardware validation.

You will design FPGA solutions in VHDL, model DSP blocks in MATLAB/Python and perform synthesis, place-and-route, timing closure, and hardware bring‑up in a highly regulated environment.

Qualifications

• Experience with RTL design and FPGA implementation.
• Experience with DSP and telecommunications systems.
• Proficiency in MATLAB and/or Python for modelling.
• Embedded C++ development experience.

Responsibilities

• Capture technical requirements and develop FPGA architectures and block diagrams.
• Design, develop and implement FPGA solutions using VHDL.
• Model and simulate DSP/IP blocks using MATLAB and/or Python.
• Perform synthesis, place-and-route and timing closure.
• Produce timing constraints and implementation constraints.
• Carry out hardware bring‑up, testing and validation.
• Work with multidisciplinary teams on payloads and sensing technologies.

Skills

RTL development

FPGA implementation

DSP

MATLAB

Python

Embedded C++

Embedded Linux

5G

Versal ACAP

Space experience

Tools

VHDL

Xilinx FPGA

Job description

Harwell, Manchester or Stevenage | 4 days on-site

The Role

An exciting opportunity has arisen for an experienced DSP Firmware Engineer to join a leading organisation within the space sector, supporting the development of cutting‑edge telecommunications payloads, sensing technologies and advanced space systems.

Working within a multidisciplinary engineering team, you’ll be responsible for the full FPGA development lifecycle, from requirements capture and architectural design through to implementation, verification and hardware validation. You’ll contribute to highly complex engineering projects that demand technical excellence, precision and innovation.

This role would suit an engineer who enjoys taking ownership, working autonomously and solving challenging technical problems within a collaborative, high‑performing team.

• Capture technical requirements and develop FPGA architectures and block diagrams.
• Design, develop and implement FPGA solutions using VHDL.
• Model and simulate DSP/IP blocks using MATLAB and/or Python where appropriate.
• Perform synthesis, place-and-route and timing closure activities.
• Produce timing constraints and other implementation constraints as required.
• Carry out hardware bring‑up, testing and validation to ensure successful implementation.
• Work closely with multidisciplinary engineering teams developing advanced telecommunications payloads and sensing technologies.

What We’re Looking For

The ideal candidate will have strong experience across the following areas:

• Requirements capture and architectural design.
• RTL development and FPGA implementation.
• Synthesis, place-and-route and timing constraint development.
• Hardware testing and validation.
• MATLAB and/or Python for modelling and simulation.
• Digital Signal Processing (DSP) and/or telecommunications systems.
• Embedded C++ development for parallel processing.
• AMD/Xilinx FPGA technologies, including Versal ACAP devices.
• Bare metal or Embedded Linux development.
• 5G telecommunications.
• Experience working within highly regulated industries such as Space, Aerospace or Defence.
• Opportunity to work on pioneering space technologies and next‑generation communications systems.
• Join a collaborative, multidisciplinary engineering team tackling technically challenging projects.
• Contribute across the full FPGA development lifecycle, from concept through to hardware validation.
• Initial 3-month contract with strong potential for extension.
• Work from one of three UK engineering hubs: Harwell, Manchester or Stevenage.

Successful candidates will be required to complete BPSS (Baseline Personnel Security Standard) screening prior to starting. This includes right‑to‑work verification, identity checks, a basic criminal record check, employment history verification and reference checks.