Senior Digital Design Engineer

TN United Kingdom; Cambridge; On-site; GBP 75,000 - 100,000; Full time

Job summary

Join a dynamic and innovative firm as an ASIC Design Engineer in Cambridge, where you'll work on groundbreaking technology in Quantum Computing. This role offers the chance to design complex IPs and low-latency interfaces, while also mentoring junior engineers. With training provided, you don't need prior experience in Quantum Computing. Enjoy a competitive salary and a comprehensive benefits package, including private medical insurance and a contributory pension scheme. This is an exciting opportunity to make a significant impact in a fast-growing company.

Benefits

Annual bonus

Private medical insurance

Life insurance

Contributory pension scheme

Equity

Qualifications

• Design and integrate complex IPs from scratch.
• Develop tests and design low-latency interfaces.

Responsibilities

• Support junior engineers and work on a variety of tasks.
• Work on cutting-edge technology in Quantum Computing.

Skills

Experience with ASIC environments at 48nm and below

Customization of RISC-V CPUs

Implementation of modern classical decoders on FPGA/ASIC

Architecture of System on Chip solutions

Job description

Job Details

Client: IC Resources

Location: Cambridge, United Kingdom

Job Category: -

EU work permit required: Yes

Job Reference: c0c7cdef84d3

Job Views: 12

Posted: 28.04.2025

Expiry Date: 12.06.2025

Job Description

ASIC Design Engineer

Location: Cambridge

Salary: £75,000 to £100,000 DOE

We have a fantastic opportunity for an ASIC Design Engineer to join a fast-growing Cambridge-based company working on cutting-edge technology in the area of Quantum Computing.

You do not need a background in Quantum Computing; training will be provided as the role progresses.

As the ASIC Design Engineer, you will design and integrate complex IPs from scratch, develop tests, and design low-latency interfaces. You will also have the opportunity to support more junior engineers and work on a variety of tasks.

Key Skills

• Experience with ASIC environments at 48nm and below
• Customization of RISC-V CPUs
• Implementation of modern classical decoders on FPGA/ASIC
• Architecture of System on Chip solutions with at least one CPU and custom accelerators

If successful, you can expect a comprehensive benefits package, including annual bonus, private medical insurance, life insurance, a contributory pension scheme, and equity. The salary is competitive and can go up to £100,000 depending on experience.

You must be able to work onsite in Cambridge.

For more information, please contact Rachel Mason at IC Resources.