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Senior Design Verification Engineer

JR United Kingdom

Cardiff

On-site

GBP 40,000 - 60,000

Full time

6 days ago
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Job summary

Join a cutting-edge company at the forefront of the RISC-V revolution. This role involves developing verification infrastructure for high-impact applications across various domains. The position offers a dynamic workspace with diverse responsibilities and excellent benefits. A perfect fit for those with a strong background in SystemVerilog and verification methodologies.

Qualifications

  • Strong proficiency in SystemVerilog and UVM.
  • Experience with industry-standard verification methodologies.
  • Ability to collaborate with design teams.

Responsibilities

  • Develop and maintain verification infrastructure.
  • Implement verification strategies to ensure product quality.
  • Manage coverage metrics and troubleshoot issues.

Skills

SystemVerilog
UVM
Debugging

Job description

Social network you want to login/join with:

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Client:

Platform Recruitment

Location:

cardiff, United Kingdom

Job Category:

Other

-

EU work permit required:

Yes

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Job Views:

4

Posted:

31.05.2025

Expiry Date:

15.07.2025

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Job Description:

Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing IC that has high-impact applications across machine learning, aerospace and automotive.

Flat structure with a highly diverse workload and excellent benefits.

Responsibilities:

  • Develop and maintain verification infrastructure in collaboration with design teams and external partners.
  • Define and implement detailed verification strategies and architectures to ensure product quality and performance.
  • Manage functional and code coverage metrics to track and report progress.
  • Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests.

Requirements:

  • Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies.
  • A solid understanding of mixed hardware/software verification approaches.
  • Experience with RISC-V architectures is preferred.
  • Proven ability to work effectively with design teams and external partners to achieve project goals.
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