Senior CPU Verification Engineer – Verilog, C++, VLSI

AMD; Cambridge; On-site; GBP 65,000 - 85,000; Full time

Benefits offered by this job

Comprehensive benefits package

Job summary

AMD in Cambridge is seeking a Staff Verification Design Engineer responsible for planning, building, and executing the verification of features for AMD's microprocessor IP, ensuring a bug-free final design.

The role requires collaboration with architects and engineers, strong analytical and problem-solving skills, and proficiency in C++, System Verilog, and IP level ASIC verification. Excellent communication and teamwork are essential.

Qualifications

• 3+ years of experience in Design Verification.
• Proficient in IP level ASIC verification.
• Good understanding and hands-on experience with SystemVerilog.

Responsibilities

• Collaborate with architects, hardware engineers, and firmware engineers for verification.
• Develop test plans and conduct thorough testing.
• Debug test failures and resolve design defects.

Skills

Analytical skills

Communication skills

Collaboration

Problem-solving

C++ programming

Education

Bachelor's or Master's degree in Computer Engineering or Electrical Engineering

Tools

C++

System Verilog

Verilog

Linux

Windows

Job description

AMD in Cambridge is seeking a Staff Verification Design Engineer responsible for planning, building, and executing the verification of features for AMD's microprocessor IP, ensuring a bug-free final design.

The role requires collaboration with architects and engineers, strong analytical and problem-solving skills, and proficiency in C++, System Verilog, and IP level ASIC verification. Excellent communication and teamwork are essential.