Research Engineer: AI for CPU Architecture (Contractor)

Huawei Technologies Research & Development (UK) Ltd; Cambridge; On-site; GBP 60,000 - 90,000; Full time

Job summary

Huawei Research and Development UK Limited in Cambridge is seeking an ambitious Research Engineer to work at the intersection of machine learning and CPU microarchitecture on the Kirin CPU Team at Huawei R&D UK (Cambridge).

You will use reinforcement learning, LLM agents and learned models to discover and validate improvements for next-generation out-of-order CPU cores, including agentic systems that turn research papers into simulated, measured results.

Qualifications

• Degree in Computer Science, Computer Engineering, Electrical Engineering or a related field (BSc, MSc or PhD), or equivalent practical experience.
• Solid understanding of out-of-order CPU microarchitecture, including speculation, branch prediction, prefetching, caches and the memory hierarchy.
• Strong C++ and Python.
• Hands-on depth in at least two of the following: architectural or cycle-accurate simulation (gem5, ChampSim, Scarab or similar); reinforcement learning or model training and post-training (PPO, GRPO or similar); LLM agent systems and tool-driven automation; compilers or low-level performance kernels (LLVM/MLIR, CUDA/Triton, SIMD); evidence of building a non-trivial system end-to-end.
• Rigorous experimental methodology and the ability to read research papers critically.
• PhD (completed or in progress) in computer architecture or ML systems.
• Publications at ISCA, MICRO, HPCA or ASPLOS, or at MLSys, NeurIPS or ICML.
• Experience with ML-based prefetchers or branch predictors, including CBP or DPC championship entries.
• Familiarity with ARMv9 (SVE2, SME2) or RISC-V.
• Understanding of the hardware cost of microarchitecture features (storage, timing and power), without RTL design responsibility.
• Open-source contributions to gem5, ChampSim, LLVM/MLIR, or your own language, runtime or ML framework.

Responsibilities

• Build RL, Bayesian and LLM-agent-driven design-space exploration over gem5 and cycle-accurate models, using fast simulation for broad search and detailed models to validate the shortlisted candidates.
• Develop agentic pipelines that read architecture papers, implement the proposed mechanisms in simulators, run experiments and verify results, including the reward design, sandboxing and checks that catch invalid or reward-hacked outcomes.
• Train surrogate and ML performance models that predict IPC and PPA impact and reduce simulation cost.
• Characterise emerging workloads on CPUs, such as on-device LLM inference, matrix and vector extensions, and KV-cache memory behaviour, and translate the findings into microarchitecture proposals.
• Attribute performance bottlenecks as hardware-fixable, software-fixable or joint, and work with compiler, runtime and kernel engineers on co-design solutions.
• Turn strong results into patents, internal reports and, where appropriate, publications.

Skills

C++ & Python

RL model training

LLM agent systems

CPU microarchitecture

Experimental methodology

Open-source contribution

Education

Bachelor/Master/PhD in CS/CE/EE or equivalent

Tools

gem5

ChampSim

Scarab

LLVM/MLIR

CUDA/Triton

Job description

About Huawei Research and Development UK Limited

Founded in 1987, Huawei is a leading global provider of information and communications technology (ICT) infrastructure and smart devices. We have 207,000 employees and operate in over 170 countries and regions, serving more than three billion people around the world.

Our vision and mission is to bring digital to every person, home and organization for a fully connected, intelligent world. To this end, we will drive ubiquitous connectivity and promote equal access to networks; bring cloud and artificial intelligence to all four corners of the earth to provide superior computing power where you need it, when you need it; build digital platforms to help all industries and organizations become more agile, efficient, and dynamic; redefine user experience with AI, making it more personalized for people in all aspects of their life, whether they’re at home, in the office, or on the go.

This spirit of innovation has led Huawei to work in close partnership with leading academic institutions in the UK to develop and refine the latest technologies. With a shared commitment to innovation and progress, both parties have worked together to achieve common goals and establish a strong partnership. The partnership between UK and Huawei help to develop the technologies of the future that will transform the way we all communicate, work and live.

For the past 30 years we have maintained an unwavering focus, rejecting shortcuts and easy opportunities that don't align with our core business. With a practical approach to everything we do, we concentrate our efforts and invest patiently to drive technological breakthroughs.

This strategic focus is a reflection of our core values:

• Staying customer-centric,
• Inspiring dedication,
• Persevering,
• Growing by reflection.

Huawei Research and Development UK Limited Overview

Huawei’s vision is a fully connected, intelligent world. To achieve this, we work to inspire passion for basic research around the world. Our combined passion drives development across the global innovation value chain. Huawei has the largest Research and Development organization in the world with 96,000+ employees in research centers around the globe. In the UK, we already have design centers in Cambridge, London, Edinburgh and Ipswich. We continue to explore and define new research directions and new services. We have expanded our collaborations with academic researchers; researched new network architectures, integration of communications and key enabling technologies; and developed the fundamental theories of these technologies. We invite you to join us on this exciting journey and drive your career forward.

Job Summary

We are seeking an ambitious Research Engineer to work at the intersection of machine learning and CPU microarchitecture on the Kirin CPU Team at Huawei R&D UK (Cambridge). You will use reinforcement learning, LLM agents and learned models to discover and validate improvements for next-generation out-of-order CPU cores, including agentic systems that turn research papers into simulated, measured results. This role suits someone early in their career who is equally comfortable in a cycle-accurate simulator and a training loop, and who has built systems from scratch because they wanted to understand how they work.

Key Responsibilities:

• Build RL, Bayesian and LLM-agent-driven design-space exploration over gem5 and cycle-accurate models, using fast simulation for broad search and detailed models to validate the shortlisted candidates.
• Develop agentic pipelines that read architecture papers, implement the proposed mechanisms in simulators, run experiments and verify results, including the reward design, sandboxing and checks that catch invalid or reward-hacked outcomes.
• Train surrogate and ML performance models that predict IPC and PPA impact and reduce simulation cost.
• Characterise emerging workloads on CPUs, such as on-device LLM inference, matrix and vector extensions, and KV-cache memory behaviour, and translate the findings into microarchitecture proposals.
• Attribute performance bottlenecks as hardware-fixable, software-fixable or joint, and work with compiler, runtime and kernel engineers on co-design solutions.
• Turn strong results into patents, internal reports and, where appropriate, publications.

This job description is only an outline of the tasks, responsibilities and outcomes required of the role. The jobholder will carry out any other duties as may be reasonably required by his/her line manager. The job description and personal specification may be reviewed on an ongoing basis in accordance with the changing needs of Huawei Research and Development UK Limited.

Required:

• Degree in Computer Science, Computer Engineering, Electrical Engineering or a related field (BSc, MSc or PhD), or equivalent practical experience.
• Solid understanding of out-of-order CPU microarchitecture, including speculation, branch prediction, prefetching, caches and the memory hierarchy.
• Strong C++ and Python.
• Hands-on depth in at least two of the following:
• Architectural or cycle-accurate simulation (gem5, ChampSim, Scarab or similar)
• Reinforcement learning or model training and post-training (PPO, GRPO or similar)
• LLM agent systems and tool-driven automation
• Compilers or low-level performance kernels (LLVM/MLIR, CUDA/Triton, SIMD)
• Evidence of building a non-trivial system end-to-end, such as an open-source project, a simulator extension, a compiler, a runtime or a tool you designed yourself.
• Rigorous experimental methodology and the ability to read research papers critically.

Desired:

• PhD (completed or in progress) in computer architecture or ML systems.
• Publications at ISCA, MICRO, HPCA or ASPLOS, or at MLSys, NeurIPS or ICML.
• Experience with ML-based prefetchers or branch predictors, including CBP or DPC championship entries.
• Familiarity with ARMv9 (SVE2, SME2) or RISC-V.
• Understanding of the hardware cost of microarchitecture features (storage, timing and power), without RTL design responsibility.
• Open-source contributions to gem5, ChampSim, LLVM/MLIR, or your own language, runtime or ML framework.