Principal FPGA Design Engineer: Defense Firmware Lead

Expleo Group; Belfast City District; Hybrid; GBP 70,000 - 95,000; Full time

Benefits offered by this job

ExpleoAcademy

Competitive company benefits

Disability Confident CommittedEmployer

Job summary

Expleo Group in Belfast is seeking a Principal FPGA Design Engineer to lead firmware architectures for defence related products. This senior role requires delivering complex FPGA/firmware from concept to verification in a highly regulated environment.

The role offers hybrid work with three days per week on client site in Belfast and opportunities to work across multidisciplinary teams, apply SystemVerilog/C++ verification, and drive process improvements.

Qualifications

• Degree level qualification in Electrical/Electronic Engineering.
• Membership or fellowship of a professional engineering body preferably with or working towards chartered status.

Responsibilities

• Work as part of firmware teams to deliver firmware projects to agreed time, cost and quality.
• Verify firmware using Hardware Verification Languages or Hardware Description languages.
• Design firmware using Hardware Description Languages.
• Enhancement of firmware related processes (documenting, scripting, reporting, process automation).
• Working closely with multi-disciplinary teams.

Skills

VHDL

Verilog

SystemVerilog

SystemVerilog/C++ Verification

OSVVM

UVVM

ModelSim

QuestaSim

IBM DOORS

PCIe

Ethernet

AXI4

MATLAB

Object-Oriented Design

Image Processing

Education

Degree in Electrical/Electronic Engineering

Tools

ModelSim

QuestaSim

IBM Rational DOORS

MATLAB

Job description

Expleo Group in Belfast is seeking a Principal FPGA Design Engineer to lead firmware architectures for defence related products. This senior role requires delivering complex FPGA/firmware from concept to verification in a highly regulated environment.

The role offers hybrid work with three days per week on client site in Belfast and opportunities to work across multidisciplinary teams, apply SystemVerilog/C++ verification, and drive process improvements.