Principal Design Engineer

ARM LIMITED; Cambridge; Hybrid; GBP 90,000 - 120,000; Full time

Benefits offered by this job

Relocation package & visa sponsorship

Accommodations provided

Job summary

ARM LIMITED is seeking an experienced hardware design engineer to develop subsystem and SoC components with RTL specifications, delivering high-quality designs on schedule. The role requires strong Verilog/SystemVerilog, verification expertise, and the ability to navigate PPA trade-offs, with emphasis on synthesis, timing analysis, and power management.

The candidate will work within ARM-based architectures, collaborating with IP teams and involving design checks, bug fixes, and active

Qualifications

• Experience in digital hardware design and Verilog HDL.
• Experience in SoC development and verification flows.
• Experience with CDC/RDC/Lint/UPF static checks.

Responsibilities

• Develop subsystem and SoC components, RTL specs and refinements to IP teams.
• Run design checks and fix bugs to maintain integration quality.
• Guide and support team members to ensure timely project delivery.

Skills

Verilog/SystemVerilog

Verification methodologies

RTL subsystems

PPA trade-offs

Synthesis & timing

Power management

Communication skills

Scripting (Perl/Python)

Education

Electrical/Computer Engineering degree

Job description

specificationsExperience with Verilog / SystemVerilog and verification methodologiesStrong delivery record of sophisticated RTL subsystems in reasonable timescalesAbility to navigate and make high-level analysis driven PPA trade-offs along with driving development for areas of ownershipExperience with synthesis and timing analysis and power management techniquesGood communication and collaboration skillsPreferred Skills and Experience:Experience with ARM-based designs and/or ARM System ArchitecturesKnowledge of AMBA protocols (e.g. AMBA ACE-Lite / AXI / AHB / APB / CHI)Familiarity with one or more of processor subsystems, Interconnects, security subsystems, PCIe subsystems, system power management flowsKnowledge of Perl, Python or other scripting languagesAdditional InformationPlease note that a relocation package (including visa sponsorship support) is available for this role, for candidates who require it.Accommodations at ArmAt Arm, we want to build extraordinary teams. If you
need an adjustment or an accommodation during the recruitment process, please email #####. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.Hybrid Working at ArmArm's approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower
groups/teams to determine their own hybrid working patterns, depending on the work and the team's needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.Equal Opportunities at ArmArm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don't discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
subsystem and SoC components, developing subsystem microarchitecture specifications and RTL, proposing refinements to IP teams based on system-level integration and usage, running various design checks and fixing bugs.You will identify areas of improvement and enhance the design methodologies used by the team and by the wider organization. You will guide and support other members of the team as needed to enable the successful completion of project activities while balancing other tasks including working with Project Management on drawing-up and managing plans and schedules.Required Skills and Experience:Bachelor's or Master's degree in Electrical/Computer Engineering or a related field, or equivalent experience in place of either degree.Experience in digital hardware design and Verilog HDLDetailed understanding of current methods and techniques for complex SoC developmentExperience in static design checks, including CDC, RDC, X-prop, Lint and UPF static checksExperience creating design