Principal Design Engineer

Camwebdir; United Kingdom; Hybrid; GBP 65,000 - 90,000; Full time

Benefits offered by this job

Relocation package

Visa sponsorship

Job summary

Arm is seeking an SoC design engineer to work on RTL and subsystem integration within a world-class organization. You will study incoming IPs, define microarchitecture, and produce RTL while collaborating with performance and power teams to optimize system KPIs.

The role involves reviewing architectures, driving design checks, and supporting project plans in a hybrid working environment. A strong background in digital design and Verilog/SystemVerilog is essential.

Qualifications

• Bachelor's or Master's in Electrical/Computer Engineering or equivalent.
• Experience in digital hardware design and Verilog HDL.
• Knowledge of AMBA protocols and SoC subsystems.

Responsibilities

• Review subsystem architecture and develop microarchitectures and RTL.
• Develop RTL and verify IP integration.
• Collaborate with performance and power analysis teams to improve KPIs.
• Support project planning and scheduling activities.

Skills

Digital design

Verilog HDL

SystemVerilog

Synthesis & timing

PPA trade-offs

Communication skills

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Python

Perl

Job description

Job Overview

Are you an RTL engineer eager to build expertise across multiple IP products? Do you want to work globally with internal teams to develop systems optimized for performance and power? If so, we want to speak with you! We’re seeking a hard-working, creative, and motivated SoC engineer to join the team developing sophisticated processing systems used in IoT, Automotive, Client and Infrastructure computing.

Responsibilities

As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team integrating IPs and developing logic for complex subsystems. You will need to understand and review the subsystem architecture, develop the microarchitecture specifications, review verification test plans and help debug and fix issues, as well as work with the performance and power analysis teams to evaluate and improve system KPIs. Your key responsibilities will include understanding incoming IPs, their functionality, interfaces and interworking with various subsystem and SoC components, developing subsystem microarchitecture specifications and RTL, proposing refinements to IP teams based on system-level integration and usage, running various design checks and fixing bugs. You will identify areas of improvement and enhance the design methodologies used by the team and by the wider organization. You will guide and support other members of the team as needed to enable the successful completion of project activities while balancing other tasks including working with Project Management on drawing-up and managing plans and schedules.

Required Skills and Experience

• Bachelor’s or Master’s degree in Electrical/Computer Engineering or a related field, or equivalent experience in place of either degree.
• Experience in digital hardware design and Verilog HDL
• Detailed understanding of current methods and techniques for complex SoC development
• Experience in static design checks, including CDC, RDC, X-prop, Lint and UPF static checks
• Experience with Verilog / SystemVerilog and verification methodologies
• Strong delivery record of sophisticated RTL subsystems in reasonable timescales
• Ability to navigate and make high-level analysis driven PPA trade-offs along with driving development for areas of ownership
• Experience with synthesis and timing analysis and power management techniques
• Good communication and collaboration skills

Preferred Skills and Experience

• Experience with ARM-based designs and/or ARM System Architectures
• Knowledge of AMBA protocols (e.g. AMBA ACE-Lite / AXI / AHB / APB / CHI)
• Familiarity with one or more of processor subsystems, Interconnects, security subsystems, PCIe subsystems, system power management flows
• Knowledge of Perl, Python or other scripting languages

Additional Information

Please note that a relocation package (including visa sponsorship support) is available for this role, for candidates who require it.

Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support includes breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.