Physical Design Engineer

IC Resources

Cambridgeshire and Peterborough

On-site

GBP 60,000 - 80,000

Full time

3 days ago
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Job summary

An established technology company in Cambridge is hiring a Physical Design Engineer to join its expanding team. The role covers the full chip development lifecycle from early design through to silicon delivery and product release, with broad exposure in a small team where contributions are visible and impactful.

You will work on the complete physical implementation flow, including floorplanning, placement, clock tree synthesis, routing, timing closure and verification.

Qualifications

  • A strong academic background in Electronics, Electrical Engineering or related discipline.
  • At least two years of industry experience within Physical Design or Physical Implementation.
  • Solid understanding of modern ASIC implementation flows and methodologies.

Responsibilities

  • Work across the full chip development lifecycle from early design through silicon delivery and product release.
  • Contribute within a small, collaborative team to have a direct impact on product development.
  • Engage in floorplanning, power planning, placement, timing closure and verification.

Skills

Communication skills
Cross-functional teamwork
Problem-solving

Education

Bachelor's degree in Electronics or Electrical Engineering

Job description

I am currently working with an established technology company in Cambridge that develops a range of high-volume computing and embedded products. Due to continued growth, they are looking to hire a Physical Design Engineer to join its expanding team.

This is an excellent opportunity for a Physical Design Engineer to work within a highly collaborative team, contributing across the full chip development lifecycle from early design stages through to silicon delivery and product release. The team is relatively small, giving engineers broad exposure and the opportunity to have a genuine impact on product development.

The successful Physical Implementation Engineer will have experience in:

  • The complete physical implementation flow, from netlist through to GDSII.
  • Floorplanning, power planning, placement and optimisation, clock tree synthesis, routing and physical verification closure.
  • Timing closure and static timing analysis.
  • Logic synthesis, equivalence checking and place-and-route methodologies.
  • Working on complex ASIC or SoC designs within advanced semiconductor environments.

Requirements:

  • A strong academic background in Electronics, Electrical Engineering or a related discipline.
  • At least two years of industry experience within Physical Design or Physical Implementation.
  • A solid understanding of modern ASIC implementation flows and methodologies.
  • Strong communication skills and the ability to work effectively within cross-functional engineering teams.

This is a fantastic opportunity to join a company with a strong engineering culture, work on technically challenging products and become part of a close-knit team where your contributions will have a direct impact.

Tel - 01189073075

LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/

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