PhD: High-Voltage SSTs for Efficient AI Data Centers

University of Warwick; Coventry; On-site; GBP 20,000 - 24,000; Full time

Benefits offered by this job

UKRI funded stipend

3.5 years funded study

Job summary

University of Warwick is inviting applications for a PhD project focused on developing medium-voltage SST cells for hyperscale AI data centres and net-zero grids. You will investigate high-frequency power conversion challenges, optimize compact magnetic links, and validate designs with multi-physics modelling and lab experiments, culminating in a hardware prototype.

The project is supervised by Dr Jiaqi Yan and Prof.

Qualifications

• First-class or strong upper second-class degree (or equivalent) in Electrical/Electronic Engineering, Physics, or related discipline.
• Hands-on experience in power electronic devices/systems or high-voltage setups.
• Solid theoretical foundation in power electronics, power semiconductor devices, or high-voltage engineering.

Responsibilities

• Develop medium-voltage SST cells tailored for hyperscale AI data centres and net-zero grids.
• Investigate core physical challenges of high-frequency power conversion.
• Design compact, ultra-efficient magnetic links and mitigate electrical-thermal degradation under repetitive high-dv/dt stresses.
• Conduct multi-physics modelling (ANSYS/COMSOL) and experimental validation in the high-voltage power electronics lab.
• Produce a scaled hardware prototype demonstrating improved efficiency and power density.

Skills

Power electronics

High-voltage design

Embedded DSP/FPGA control

Education

Bachelors in Electrical/Electronic Engineering or Physics

Tools

ANSYS

COMSOL

DSP/FPGA tools

Job description

University of Warwick is inviting applications for a PhD project focused on developing medium-voltage SST cells for hyperscale AI data centres and net-zero grids. You will investigate high-frequency power conversion challenges, optimize compact magnetic links, and validate designs with multi-physics modelling and lab experiments, culminating in a hardware prototype.

The project is supervised by Dr Jiaqi Yan and Prof.