Low-Power Analog IC Design Intern

Analog Devices, Inc.

City of Edinburgh

On-site

GBP 18,000 - 24,000

Full time

7 days ago
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Job summary

Analog Devices, Inc. in Edinburgh is seeking an Analog Design Intern – Power Management to join our engineering team. You will work on low-power analog and IP development for mixed-signal ICs, contributing to circuit architecture, modelling and verification.

The internship offers hands-on experience alongside experienced engineers, exposure to DC/DC converters, and opportunities to learn about layout and silicon evaluation in a collaborative environment.

Qualifications

  • Pursuing a BEng/MEng/MSc/PhD in Electronic/Electrical Engineering, Microelectronics or related field.
  • Solid understanding of analog electronics and circuit theory.
  • Familiarity with CMOS devices and transistor-level operation.
  • Experience with circuit simulation or design tools through university or projects.
  • Strong analytical and problem-solving skills; good communication.

Responsibilities

  • Conduct architecture research and feasibility studies for low-power PM functions.
  • Contribute to architecture, design, simulation and verification of DC/DC IP.
  • Design and analyse analog sub-circuits used in power converters.
  • Develop testbenches and contribute to design verification across conditions.
  • Collaborate with layout engineers during physical implementation.

Skills

Analog IC design
Power management
DC/DC converters
Circuit simulation
Python scripting

Education

Bachelor/Master/PhD in Electronic/Electrical Engineering or Microelectronics

Tools

Cadence Virtuoso
Spectre
MATLAB/Simulink

Job description

Analog Devices, Inc. in Edinburgh is seeking an Analog Design Intern – Power Management to join our engineering team. You will work on low-power analog and IP development for mixed-signal ICs, contributing to circuit architecture, modelling and verification.

The internship offers hands-on experience alongside experienced engineers, exposure to DC/DC converters, and opportunities to learn about layout and silicon evaluation in a collaborative environment.

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