Lead Space Terminal Modem Architect

Eutelsat Communications SA; Greater London; On-site; GBP 120,000 - 180,000; Full time

Job summary

Eutelsat Communications SA is seeking an experienced modem architect to become the technical authority on the physical layer for the next generation LEO/multi-orbit terminals. The role targets a single-chip modem module where the PHY, protocol stack, and host processor share an SoC, built from vector compute engines and a RISC-V controller.

You will own requirements, model link performance, challenge design choices, and reproduce results when claims require testing.

Qualifications

• MSc or PhD in signal processing, digital communications, telecommunications or electronics.
• 12+ years in digital modem or wireless physical layer engineering, including architecture or product acceptance.
• Deep expertise in synchronization and estimation theory for real receivers: acquisition at low SNR, timing recovery, phase tracking, channel estimation and equalisation.
• Proven experience with fixed-point design, LDPC/turbo/polar decoding, and vector DSP platforms.
• Hands-on experience with programmable PHY platforms and their SDKs; strong C/C++ with vector intrinsics.
• Fluent professional English.

Responsibilities

• Own the terminal physical layer requirements and their traceability from service constraints to waveform parameters.
• Master the platform hands-on: SDK, PHY architecture, DMA, interrupts and inter-processor communication.
• Audit and challenge the receive chain design: acquisition, CFO/SFO, timing recovery, Doppler handling.
• Review the transmit chain: PAPR, spectral masks, DPD interface, EVM and spectral budgets.
• Define acceptance criteria, lead architecture reviews, and ensure portability across silicon generations.

Skills

Modem architecture

C/C++ programming

RISC-V

DSP/vector processors

MATLAB/Python

Education

MSc or PhD in signal processing or related field

Tools

SDKs

Vector compute engines

Job description

Eutelsat Communications SA is seeking an experienced modem architect to become the technical authority on the physical layer for the next generation LEO/multi-orbit terminals. The role targets a single-chip modem module where the PHY, protocol stack, and host processor share an SoC, built from vector compute engines and a RISC-V controller.

You will own requirements, model link performance, challenge design choices, and reproduce results when claims require testing.