Lead FPGA Design Engineer

Yoh, A Day & Zimmermann Company; Southampton; Hybrid; GBP 60,000 - 90,000; Full time

Job summary

A leading deep-tech company in Southampton is seeking a Lead FPGA Design Engineer for their satellite communications projects. This role involves developing high-performance signal processing technology and leading projects, offering a competitive salary, equity, and excellent benefits within a collaborative team environment.

Benefits

Competitive base salary

Equity

Pension

Private medical

Supportive hybrid work setup

Qualifications

• Extensive experience developing complex digital designs in Verilog or SystemVerilog.
• Strong track record delivering high-throughput FPGA or ASIC IP.
• Expertise in simulation, synthesis, timing optimisation, and lab-based validation.

Responsibilities

• Take a central role in shaping and delivering complex RTL designs.
• Lead key projects and mentor junior engineers.
• Drive the development of production-ready IP for advanced Layer 1 systems.

Skills

Verilog

SystemVerilog

FPGA development

ASIC design

Simulation

Synthesis

Timing optimisation

UVM-based verification

Project leadership

Collaboration

Job description

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Yoh, A Day & Zimmermann Company provided pay range

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Principal Recruiter | Electronic Engineering at Yoh, A Day & Zimmermann Company

Lead FPGA Design Engineer – Space-Based 5G Communications

Location: Southampton, UK (Hybrid)

Package: Competitive base salary + equity + pension + private medical

A well-funded, fast-growing deep-tech company is developing high-performance signal processing technology for deployment onboard satellites.

They are looking to appoint a Lead FPGA Design Engineer to take a central role in shaping and delivering complex RTL designs for FPGA (and ASIC) targets. This is a senior, hands-on role where technical excellence and delivery ownership go hand in hand. The successful candidate will lead key projects, mentor junior engineers, and drive the development of optimised, production-ready IP for advanced Layer 1 systems.

This is a rare opportunity to join a high-calibre team working at the forefront of next-generation satellite communications, with significant scope to influence both product direction and engineering methodology.

What they’re looking for:

• Extensive experience developing complex digital designs in Verilog or SystemVerilog
• Strong track record delivering high-throughput FPGA or ASIC IP, ideally in signal processing or comms applications
• Expertise in simulation, synthesis, timing optimisation, and lab-based validation
• Proficiency with industry-standard EDA tools and UVM-based verification
• Ability to lead projects, define architecture, and support junior engineers
• Comfortable collaborating across hardware, software, and systems disciplines
• Space or satellite comms experience is not essential—but curiosity and a builder’s mindset are highly valued

Why consider this opportunity?

• Join a collaborative, low-bureaucracy environment where your technical input has real impact
• Help build mission-critical technology powering global communications from space
• Take on a high-trust role with strong influence over architecture and engineering direction
• Enjoy a competitive salary, meaningful equity, and a supportive hybrid work setup
• Excellent benefits including private healthcare and pension

Interested?

Please apply with your CV or get in touch to arrange a confidential discussion.

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Information Technology and Engineering

• Industries

  Telecommunications and Space Research and Technology

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