Implant & RTP Process Engineer — Yield & Process Optimizer

Vishay Intertechnology, Inc.; Newport; Hybrid; GBP 42,000 - 64,000; Full time

Job summary

Vishay Intertechnology, Inc. Newport site is seeking an Implant/RTP Process Engineer to lead and sustain wafer processing, drive improvements and transfer technologies between sites.

You will manage process qualification, DOE studies and robust control plans while ensuring safe, efficient operations in the RTP/Implant area. The role requires 3+ years in wafer fab, strong teamwork and communication skills, and familiarity with JIT/Kaizen/TPM concepts.

Qualifications

• Degree or HND in a science/engineering field is preferred.
• Minimum 3 years wafer fab experience.
• Strong communication and team-working abilities.
• Familiar with JIT, Kaizen, Zero Defects, SPC, TQM and TPM.

Responsibilities

• Maintenance and development of RTP/Implant processes across the fab.
• Ensure documentation and operating specifications are in place.
• Communicate effectively to shift personnel and other groups.
• Ensure MIS (Promis) process flows are correct on owned equipment.
• Lead improvement projects to meet cost, yield, and capacity goals.
• Qualify new or relocated equipment.
• Use DOE to improve Cp/Cpk for etch processes.
• Implement robust control checks and process charts.
• Optimize recipes for cost, capacity and robustness.
• Develop and maintain process FMEAs for proactive scrap prevention.

Skills

Wafer fab experience

Team collaboration

Process improvement

Communication skills

Education

Degree/HND in Engineering or Science

Tools

XR9500

Axcelis GSD 200

Purion implanters

Mattson 2800 RTA

3D Micromac Laser

Job description

Vishay Intertechnology, Inc. Newport site is seeking an Implant/RTP Process Engineer to lead and sustain wafer processing, drive improvements and transfer technologies between sites.

You will manage process qualification, DOE studies and robust control plans while ensuring safe, efficient operations in the RTP/Implant area. The role requires 3+ years in wafer fab, strong teamwork and communication skills, and familiarity with JIT/Kaizen/TPM concepts.