Hybrid FPGA Design Engineer (RTL/VHDL)

Platform Recruitment; Coventry; Hybrid; GBP 54,000 - 66,000; Full time

Job summary

Platform Recruitment is seeking an FPGA Design Consultant (Full Time) in Coventry with a hybrid working pattern. You will analyse requirements, specify and document FPGA solutions, and convert architectures into RTL using VHDL or Verilog.

Responsibilities include RTL verification at module/top levels, performing synthesis and timing analysis, power/performance assessments, and integrating FPGAs into a target hardware platform.

Qualifications

• Degree (or equivalent) in a relevant engineering discipline.
• Excellent knowledge of digital design techniques.
• Proficiency in RTL design, with coding experience in VHDL or Verilog.
• Proficiency with FPGA simulation and synthesis tools.
• Understanding of the FPGA design process.
• Experience with formal verification and timing analysis.
• Some direct FPGA design experience.

Responsibilities

• Analyse requirements, then specify and document an FPGA solution, breaking it down into manageable work packages.
• Define module level architectures and capture the detail in design specifications.
• Convert architectures into RTL while balancing constraints such as area, speed, power and performance.
• Verify the RTL at module level and top level.
• Carry out synthesis and timing analysis.
• Carry out power and performance analysis.
• Integrate FPGAs into a target hardware platform.

Skills

Digital design

RTL design (VHDL/Verilog)

FPGA design experience

Timing analysis

Formal verification

Synthesis & timing analysis

Education

Bachelor's degree in Engineering

Tools

FPGA simulation tools

Synthesis tools

VHDL

Verilog

Job description

Platform Recruitment is seeking an FPGA Design Consultant (Full Time) in Coventry with a hybrid working pattern. You will analyse requirements, specify and document FPGA solutions, and convert architectures into RTL using VHDL or Verilog.

Responsibilities include RTL verification at module/top levels, performing synthesis and timing analysis, power/performance assessments, and integrating FPGAs into a target hardware platform.