Hands-on ASIC Verification Engineer for AI Accelerators & SoC

Ecarx Co.; Greater London; Presencial; GBP 65.000 - 90.000; Jornada completa

Descripción de la vacante

Ecarx Co. is seeking a motivated ASIC Design Verification Engineer to contribute to the functional verification of AI accelerators and high-performance SoCs.

You will develop verification plans, SystemVerilog/UVM testbenches, and IP IVPs, working closely with architects, RTL designers, and system engineers. The role emphasizes hands-on verification, coverage-driven methods, and delivering production-ready designs.

Formación

• 2+ years of hands-on experience in digital ASIC/SoC functional verification.
• Strong proficiency in SystemVerilog and UVM-based verification.
• Experience developing and executing IVPs and testbenches.
• Familiarity with simulation and debugging tools (Cadence Xcelium, Synopsys VCS, Questa).
• Knowledge of coverage concepts and verification closure.
• Scripting in Python/Tcl/Perl/shell.
• Ability to work with architects and RTL engineers.

Responsabilidades

• Develop and execute functional verification plans for AI accelerators and complex SoC blocks.
• Create and maintain SystemVerilog/UVM testbenches and verification components.
• Develop IVPs with test cases, coverage points, and results traceability.
• Verify IP-level and subsystem-level functional verification.
• Develop constrained-random tests and coverage-driven verification.
• Debug and resolve functional issues with RTL engineers.

Conocimientos

SystemVerilog

UVM

IVP development

Testbench development

Python scripting

Debugging

Regression testing

Educación

Bachelor's or Master's in Electrical/Computer Engineering or Computer Science

Herramientas

Cadence Xcelium

Synopsys VCS

Siemens Questa

Descripción del empleo

Ecarx Co. is seeking a motivated ASIC Design Verification Engineer to contribute to the functional verification of AI accelerators and high-performance SoCs.

You will develop verification plans, SystemVerilog/UVM testbenches, and IP IVPs, working closely with architects, RTL designers, and system engineers. The role emphasizes hands-on verification, coverage-driven methods, and delivering production-ready designs.