Fpga Engineer

Oxford Knight; Greater London; On-site; GBP 70,000 - 100,000; Full time

Benefits offered by this job

Competitive salary

Generous benefits

Professional development

Casual culture

Job summary

Oxford Knight represents a leading quant and systematic hedge fund seeking a mid-level FPGA Engineer to join their IT team in London. You will provide technical project management and guidance while hands-on with infrastructure projects across the EMEA region and beyond.

Key requirements include 3+ years in RTL design/verification for FPGAs (Verilog/SystemVerilog/VHDL), experience with Xilinx Vivado (preferred) or Intel Quartus, Python verification, and Modelsim/Questa simulations.

Qualifications

• 3+ years in RTL design and verification for FPGAs using Verilog, SystemVerilog or VHDL.
• Experience in FPGA toolchains using Xilinx Vivado (preferred) or Intel Quartus.
• Experience using Python within verification frameworks.
• Experience with simulation environments, Modelsim/Questa preferred.
• Knowledge of C++ for writing hardware APIs.
• Degree in Electrical/Electronic Engineering (or related)

Responsibilities

• Provide technical project management and guidance; hands-on with infrastructure projects.
• Hands-on development and support across EMEA and global markets.

Skills

RTL design

FPGA verification

Verilog/SystemVerilog/VHDL

Python in verification

C++ for hardware

Education

Bachelor in Electrical/Electronic Engineering

Tools

Xilinx Vivado

Intel Quartus

Modelsim/Questa

Job description

Our client is a leading tech-driven quant and systematic hedge fund trading with offices across the globe. They leverage deep knowledge in data, research, technology and trading to deliver high-quality returns in a dynamic and fast-paced environment, with excellent opportunities for career growth.

They’re looking to hire a mid-level FPGA Engineer to join the IT team based in London, which trades across all the major EMEA, Asian and US markets. You’ll be expected to provide technical project management and guidance and will be hands‑on with infrastructure projects across the EMEA region as well as globally.

Requirements

• 3+ years’ experience in RTL design and verification for FPGAs using Verilog, SystemVerilog or VHDL
• Experience in FPGA toolchains using Xilinx Vivado (preferred) or Intel Quartus
• Experience using Python within verification frameworks
• Experience of simulation environments, Modelsim/Questa preferred
• Knowledge of C++ for writing hardware APIs
• Degree in Electrical/Electronic Engineering (or related)

Nice-to-Have

• Knowledge of Market Data protocol
• Experience with strategy implementation
• Great opportunity to be part of a collaborative, creative environment where you can feel valued for your input
• Competitive salary + generous benefits
• Professional and personal development
• Relaxed, casual culture, with a healthy work-life balance

Whilst we carefully review all applications, to all jobs, due to the high volume of applications we receive it is not possible to respond to those who have not been successful.