Design Verification Engineer

JR United Kingdom; City Of London; On-site; GBP 50,000 - 75,000; Full time

Job summary

A prestigious company is seeking a GPU Verification Engineer to join their GPU Division in City of London. The role offers the chance to work on cutting-edge graphics and AI chips, requiring skills in verification processes and strong knowledge of SystemVerilog and UVM. Candidates appreciated for leadership and mentoring abilities will thrive in this innovative environment, with remote opportunities for technically esteemed professionals.

Qualifications

• Proven track record developing verification environments for complex RTL designs.
• Excellent understanding of verification closure challenges.
• Confidence defining verification requirements and implementing testbenches.

Responsibilities

• Responsible for all verification activities related to a GPU component.
• Create verification plans and develop UVM testbench components.
• Lead and mentor team members in GPU verification.

Skills

SystemVerilog

UVM (Universal Verification Methodology)

Root-cause analysis

Constrained-random verification methodology

Job description

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Design Verification Engineer, london (city of london)

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Client:

IC Resources

Location:

london (city of london), United Kingdom

Job Category:

Other

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EU work permit required:

Yes

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Job Views:

2

Posted:

16.06.2025

Expiry Date:

31.07.2025

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Job Description:

Work on cutting edge designs within a prestigious group!

I am seeking a GPU Verification Engineer to join my clients growing GPU Division. This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within their prestigious Graphics group. Here you will exercise your skills on key components that meet latest demands and improvements for graphics, AI or connectivity processor and related IP.

You will get the chance to work for a powerhouse whereby you will spend your time creating the graphics and AI chips that are at the core of your favourite electronic products.

You will:

• Be responsible for the delivery of all verification activities related to a GPU component or sub-system from early stages of verification planning to sign-off
• Create verification plans, develop and maintain UVM testbench components
• Participate in all stages of design specification definition providing feedback from the verification perspective
• Develop testbenches in UVM, write tests, sequences, functional coverage, assertions & verification plans.
• Be responsible for the definition, effort estimation and tracking of your own work
• Be able to influence and advance our GPU verification methodology
• Have the opportunity to lead, coach and mentor other members of the team
• Participate in design and verification reviews and recommend improvements

Qualifications

• Have a proven track record of developing verification environments for complex RTL designs
• Have excellent understanding of constrained-random verification methodology and challenges of verification closure
• Be confident in defining verification requirements, and work out the implementation approach and details of a testbench
• Be able to do root-cause analysis of complex issues and resolve them in a timely manner
• Have excellent knowledge of SystemVerilog and UVM

Remote opportunities can be considered for candidates who possess technical excellence.

For more information and a confidential discussion on this superb opportunity contact Rachel Mason at IC Resources.