Design Verification Application Engineer, Senior Staff

Synopsys, Inc.; Reading; On-site; GBP 60,000 - 100,000; Full time

Job summary

An established industry player is seeking a highly motivated senior engineer specializing in Digital Design Verification. In this pivotal role, you will ensure that designs comply with protocol standards and system requirements, utilizing your expertise in SystemVerilog assertions and debugging. With over 7 years of experience, you will work closely with cross-functional teams, driving innovation and enhancing customer satisfaction. This position offers the opportunity to grow into a leadership role within a dynamic team focused on cutting-edge technologies in the semiconductor industry. Join us to make an impact and shape the future of verification.

Qualifications

• 7+ years of experience in Digital Design Verification at a chip design or EDA company.
• In-depth understanding of verification flows and test plans.

Responsibilities

• Collaborate with customers to ensure designs meet standards before chip development.
• Verify functionality early in the design phase to catch bugs.

Skills

Digital Design Verification

SystemVerilog assertions

Debugging RTL and gate-level simulation

Analytical skills

Problem-solving skills

Consulting mindset

Education

Degree in Computer Engineering

Degree in Electrical Engineering

Tools

Jira

Job description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly motivated senior engineer with a passion for Digital Design Verification. With an in-depth understanding of verification flows, test plans, and strategies, you thrive on ensuring that designs comply with protocol standards and system requirements. You are experienced in creating and examining functional coverage, writing SystemVerilog assertions, and debugging RTL and gate-level simulation failures. Your background in firmware debugging and bug tracking using software tools like Jira sets you apart. You possess a consulting mindset and take pride in making customers successful, bringing over 7 years of experience in DV working for a chip design or EDA company. With a degree in Computer Engineering or Electrical Engineering, you are ready to take on this significant individual contributor role and potentially grow into a Verification Lead position.

What You’ll Be Doing:

• Collaborating with customers to confirm that designs comply with protocol standards and system requirements before they are developed into chips.
• Exhaustively verifying functionality in the design phase to catch bugs early in the development cycle.
• Working independently with sales, R&D, and other field AE teams to ensure customer and Synopsys goals are met.
• Creating and examining functional coverage and writing SystemVerilog assertions.
• Debugging RTL and gate-level simulation failures and firmware.
• Tracking bugs using software tools such as Jira and performing code coverage analysis.

The Impact You Will Have:

• Ensuring that designs comply with industry standards and system requirements, leading to reliable and high-quality products.
• Identifying and rectifying bugs early in the development cycle, reducing costs and time to market.
• Collaborating across teams to drive innovation and achieve Synopsys’ goals.
• Enhancing customer satisfaction through successful consulting and support.
• Contributing to the development of cutting-edge technologies in the semiconductor industry.
• Potentially growing into a leadership role, shaping the future of the verification team.

What You’ll Need:

• In-depth understanding of verification flows, test plans, and strategies.
• Expertise in constrained-random SystemVerilog testbenches using UVM or VMM.
• Experience in creating and examining functional coverage and writing SystemVerilog assertions.
• Skills in debugging RTL and gate-level simulation failures and firmware.
• Familiarity with bug tracking tools like Jira and performing code coverage analysis.

Who You Are:

• A detail-oriented professional with strong analytical and problem-solving skills.
• An excellent communicator who can effectively collaborate with cross-functional teams.
• A proactive individual with a consulting mindset, dedicated to customer success.
• A highly organized engineer capable of managing multiple tasks and projects.
• A continuous learner who stays updated with the latest industry trends and technologies.

The Team You’ll Be A Part Of:

You will join a dynamic and innovative team focused on Digital Design Verification. The team collaborates with various departments, including sales, R&D, and other field teams, to ensure the successful verification of complex designs. As a significant individual contributor, you will have the opportunity to grow into a leadership role, overseeing the regional verification AE team in the UK/Benelux region.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.