AI Modelling and Simulation Engineer

Lumai; Oxford; On-site; GBP 110,000 - 160,000; Full time

Job summary

Lumai, an Oxford-based optical compute company, seeks a Senior Modelling Engineer to own performance and power modelling for AI hardware. You’ll build a Python-based framework, model compute engines, memory, interconnects and accelerator blocks across device configurations, aligning predictions with RTL or emulation results to guide architecture decisions.

You’ll lead with CI/CD pipelines, ingest MLIR outputs from multiple compiler flows, and translate findings into actionable direction for the

Qualifications

• Proven experience building or substantially extending a hardware/software performance modelling or simulation framework for AI/ML accelerators.
• Strong understanding of hardware concurrency, event-driven modelling and AI inference accelerator micro-architecture.
• Hands-on experience characterising AI operators and correlating model predictions with real hardware or hardware-accurate reference data.
• Familiarity with compiler internals and intermediate representations such as MLIR, including tooling that consumes compiler output to drive simulation.
• Strong software engineering and technical leadership practice: framework design, CI/CD ownership, and direction or review of junior engineers' or interns' work.

Responsibilities

• Design, build and maintain a Python-based framework that models hardware and software latency, hardware concurrency and event-driven relationships.
• Model compute engines, interconnect and synchronisation fabric, memory and bridge interfaces, and accelerator blocks across device configurations.
• Characterise convolution, depthwise convolution, pooling, attention and other operator workloads against hardware, RTL or emulation results.
• Build compiler-agnostic interfaces that ingest compiled models and MLIR from multiple internal compiler flows.
• Analyse simulation traces with the architecture and compiler teams to improve layer-to-hardware mappings and resolve performance discrepancies.
• Run industry benchmarks and representative models - UL Procyon, Geekbench AI, Stable Diffusion and contemporary LLMs - to produce decision-ready KPIs.
• Develop block-level power models and validate worst-case power scenarios with the micro-architecture, verification and physical-design teams.
• Own the CI/CD pipelines and simulation flows that keep results reliable and reproducible as usage scales.
• Translate modelling findings into architecture and compiler decisions, setting technical direction and developing engineers or interns as the team grows.

Skills

Python

Performance modelling

AI accelerator architecture

CI/CD ownership

Leadership

MLIR familiarity

Hardware concurrency

Tools

MLIR

CI/CD

RTL emulation

Job description

Lumai is moving from optical-compute research into production AI systems, and the architecture and compiler decisions that shape the product are being made now, ahead of the silicon that will confirm them. This hire builds the modelling capability those decisions rest on.

The Role

You will own the performance and power modelling framework that predicts how Lumai's photonic AI hardware performs against real inference workloads, giving the architecture and compiler teams one shared source of truth for latency, throughput and power across device configurations. You will model the compute engines, interconnect, memory and bridge interfaces; keep the model honest by characterising operator-level workloads against hardware, RTL or emulation results; and turn what the model says into decisions teams act on.

What is genuinely hard about this is balancing speed, fidelity and usability. The model has to capture concurrency, event-driven behaviour and compute-block latency in enough detail to support real architecture decisions, and still compare configurations in minutes rather than overnight. The gap between what the model predicts and what the hardware does has to be measured rather than assumed, and closing it is the part that never stops.

By month six, you will have a reliable modelling flow for priority workloads and device configurations, a demonstrated path for closing the gap between model and hardware, and a simulator the architecture and compiler teams use to make decisions rather than a side artefact. You will report to the Head of Architecture or the VP of Engineering, and may build a small team around the capability.

What You'll Do

• Design, build and maintain a Python-based framework that models hardware and software latency, hardware concurrency and event-driven relationships.
• Model compute engines, interconnect and synchronisation fabric, memory and bridge interfaces, and accelerator blocks across device configurations.
• Characterise convolution, depthwise convolution, pooling, attention and other operator workloads against hardware, RTL or emulation results.
• Build compiler-agnostic interfaces that ingest compiled models and MLIR from multiple internal compiler flows.
• Analyse simulation traces with the architecture and compiler teams to improve layer-to-hardware mappings and resolve performance discrepancies.
• Run industry benchmarks and representative models - UL Procyon, Geekbench AI, Stable Diffusion and contemporary LLMs - to produce decision-ready KPIs.
• Develop block-level power models and validate worst-case power scenarios with the micro-architecture, verification and physical-design teams.
• Own the CI/CD pipelines and simulation flows that keep results reliable and reproducible as usage scales.
• Translate modelling findings into architecture and compiler decisions, setting technical direction and developing engineers or interns as the team grows.

What We're Looking For

Must-have

• Proven experience building or substantially extending a hardware/software performance modelling or simulation framework for AI/ML accelerators, ideally in Python.
• Strong understanding of hardware concurrency, event-driven modelling and AI inference accelerator micro-architecture: compute, memory hierarchy, interconnect and dataflow.
• Hands-on experience characterising AI operators and correlating model predictions with real hardware or hardware-accurate reference data.
• Familiarity with compiler internals and intermediate representations such as MLIR, including tooling that consumes compiler output to drive simulation.
• Strong software engineering and technical leadership practice: framework design, CI/CD ownership, and direction or review of junior engineers' or interns' work.

Strong preference for

• Direct experience with NPU, GPU or other edge or client AI inference accelerator architectures.
• Experience across multiple compiler toolchains, reconciling architecture-level and production compiler behaviour.
• Exposure to power modelling, RTL, emulation, FPGA prototyping, photonic compute or another non-traditional compute architecture.

About Lumai

Lumai is the optical compute company building the next generation of AI infrastructure. Spun out of optics research at the University of Oxford in 2021, we compute with light instead of electrons. Our 3D optical technology carries out the matrix multiplications at the heart of AI inside beams of light travelling through free space, which lets it go beyond the limits of both silicon GPUs and integrated photonics.

In April 2026 we launched Iris Nova, the world's first optical computing system to run billion-parameter large language models in real time, using up to 90% less energy than conventional GPU-based systems. Iris Nova, the first server in the family, is now available for evaluation by hyperscalers, neoclouds, enterprises and research institutions. Aura and Tetra will follow.

Our work won the Falling Walls Award for Science Breakthrough of the Year 2025 and 'Best Overall Technology' at the OCP Future Technologies Symposium. We are headquartered in Oxford.

Why Lumai

You'll work on a new kind of computer. Optical computing for AI has been promised for decades. We have a working system running real models, and the hard part left is taking it to volume.

Your work ships. We are moving from first product to volume production, so what you build this year goes into the servers our customers run.

You'll work across disciplines. Optical engineers, machine learning researchers, and hardware and software engineers solve problems together. You will learn things that don't appear on your job description.

The work matters beyond Lumai. AI's appetite for energy is one of the defining constraints of the next decade. Our mission is sustainable intelligence at global scale: AI that is faster, cheaper to run and far less power-hungry.

You'll join early. You'll have a real say in how we build the product, the team and the way we work.

Lumai is an equal opportunity employer. We make hiring decisions based on skills, experience and potential, and we welcome applications from people of all backgrounds. If you need an adjustment at any stage of the hiring process, let us know and we will do our best to support you.