Standard Cell Library Characterization Engineer

Microchip Technology Inc.; France; Hybrid; EUR 60,000 - 90,000; Full time

Job summary

Microchip Technology Inc. seeks a Library Characterization Engineer to characterize standard cell libraries across multiple nodes, delivering silicon-correlated timing, power, and noise models for SoC design closure.

You will bridge circuit design, EDA tools, and advanced process technology. You will generate Liberty models, develop robust characterization flows, and automate processes with Python/TCL/Shell.

Qualifications

• Master's degree in Electrical Engineering or related field.
• Strong understanding of CMOS circuit design, timing arcs, and cell behavior.
• Familiarity with Liberty syntax, NLDM/CCS/LVF modeling, and timing/power semantics.

Responsibilities

• Characterize standard cell libraries for timing, power, noise across PVT corners.
• Generate and validate Liberty models for synthesis, STA, PnR flows.
• Develop and maintain characterization flows using Cadence Liberate and Synopsys tools.
• Run SPICE simulations (HSPICE, FineSim, Spectre) for cell-level characterization.
• Collaborate with circuit designers to debug correlation issues.
• Create scripts to automate characterization, validation and release.

Skills

CMOS design

Timing analysis

Cell behavior

Liberty modeling

NLDM/LVF modeling

Python scripting

TCL scripting

Perl scripting

Shell scripting

Education

Master's degree in Electrical Engineering

Tools

Cadence Liberate

Synopsys SiliconSmart

PrimeLib

HSPICE

FineSim

Spectre

Job description

Microchip Technology Inc. seeks a Library Characterization Engineer to characterize standard cell libraries across multiple nodes, delivering silicon-correlated timing, power, and noise models for SoC design closure.

You will bridge circuit design, EDA tools, and advanced process technology. You will generate Liberty models, develop robust characterization flows, and automate processes with Python/TCL/Shell.