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Qualcomm France S.A.R.L. is seeking a System & Performance Validation Engineer to design and execute validation plans for interconnects, running bare metal and Linux benchmarks on custom emulators. The role emphasizes low-level software, ARM architecture, and performance analysis within a Linux environment.
The candidate will work with FPGA/RTL debugging tools and participate in automation efforts, leveraging C/Assembly and Python skills in a Linux setting.
Qualcomm France S.A.R.L.
Engineering Group, Engineering Group > ASICS Engineering
Qualcomm Interconnect Technology (QITC) has been breaking ground in interconnect design for 15 years and continues to innovate and deliver technology in line with the latest evolutions in SoC design.
As part of Qualcomm Infrastructure division, QITC's mission is to develop and deploy custom-built interconnect hardware IPs, software tools, exploration and verification methodologies, including Emulation platforms, so that SoC integration teams can quickly assemble SoCs with the desired Power, Performance, Area characteristics.
The engineer will be in charge of defining and implementing System & Performance validation plans centered around QCOM interconnects, by running bare metal testcases and Linux benchmarks for latest CPU architectures on custom Emulators, as well as NSP micro-benchmark execution. He or she will then participate in the infrastructure performance analysis, exploration and automatization infrastructure.
Micro-electronics or similar Engineer Diploma 5 years + 5 years of industry experience minimum
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
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