Senior RTL Hardware Design Engineer — Stock Options

Arago; Paris; On-site; EUR 90,000 - 120,000; Full time

Benefits offered by this job

Relocation bonus

Stock option plan

Healthcare coverage

Pension contributions

25 days PTO

Job summary

Arago, an AI and hardware company in the Paris area, is looking for engineers to design and verify RTL blocks for a custom tensor compute unit powering AI/ML workloads. You will interface with system software and architecture teams to align specifications with performance goals and hardware integration.

Join a multicultural engineering-led team, with relocation support within 20 minutes of the company location, stock options, healthcare and pension contributions, and generous PTO.

Qualifications

• Proven experience in RTL design for control logic, datapaths, and memory subsystems.
• Strong knowledge of digital architecture and system integration.
• Experience with ASIC/FPGA design flows and verification methodologies.

Responsibilities

• Design, implement, and verify RTL blocks for memory, control, and compute subsystems.
• Collaborate with software and architecture teams to define specs.
• Develop and maintain verification infrastructure across simulation and hardware testbenches.
• Support synthesis, timing analysis, and backend integration with CAD engineers.
• Contribute to hardware-software co-design and future compute platform iterations.

Skills

RTL design

Digital architecture

Functional verification

ASIC/FPGA design flows

Hardware stack

English proficiency

Tools

UVM

Job description

Arago, an AI and hardware company in the Paris area, is looking for engineers to design and verify RTL blocks for a custom tensor compute unit powering AI/ML workloads. You will interface with system software and architecture teams to align specifications with performance goals and hardware integration.

Join a multicultural engineering-led team, with relocation support within 20 minutes of the company location, stock options, healthcare and pension contributions, and generous PTO.