Senior Principal Computer Architect AI/ML (f/m/d)

NXP Semiconductors

Grenoble

Sur place

EUR 70 000 - 100 000

Plein temps

14 jours+
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Résumé du poste

NXP Semiconductors is seeking an experienced Senior Computer Architect to join their in-house Neural Processor Unit design team in Grenoble, France. This role focuses on AI accelerator IP design, requiring expertise in hardware and software interactions.

The ideal candidate will have a minimum of 10 years of experience, proficiency in RTL design, C/C++, and Python, as well as strong communication skills for cross-functional collaboration and problem-solving.

Qualifications

  • Minimum 10 years of experience in relevant fields.
  • Ability to map Power/Performance/Area requirements into HW architectures.
  • Deep knowledge of RTL design, C/C++, Python, and working with software teams.

Responsabilités

  • Research and develop AI accelerator IPs.
  • Track technical forums and literature in the AI/ML domain.
  • Interact with external teams on software tools, SOC performance models, and verification.

Connaissances

Architecture/design of highly parallel/SIMD/Vector/Matrix processing
RTL design/simulation/verification
C/C++ Embedded programming
Python for modeling/automation
Communication skills

Description du poste

NXP is looking to hire an experienced architect (f/m/d) for its in-house Neural Processor Unit design team. In this role, the candidate would join a multi-national world-class organization with cutting-edge technology. NXP aims to be a market leader in the intelligent edge and the chosen candidate will be playing a pivotal role in underpinning this endeavour. The role itself is hardware focused, but requires intimate knowledge of how Software would use compute resources – this includes embedded software, as well as the compilation tools that map the application.

Job Summary
  • We are looking for a Senior Computer Architect to research, develop, and advance the state-of-the-art in Artificial Intelligence (AI) accelerator IPs used in various products for different applications.
  • Knowledge of the latest neural network architectures and methods of reduction to embedded implementations with real-world cost/power constraints is key to success in this role.
  • Responsibilities will include participation and tracking technical forums and literature. The role requires up-to-date knowledge of recent trends in industry and academia.
  • Expertise in RTL design, C++/Python software design, and/or advanced Computer Architecture will be necessary to direct the activities of other members of the team doing this type of work.
  • The candidate will be a senior member of a dynamic and innovative team, pushing the rapidly evolving AI/ML technology forward.
Key Challenges
  • You will leverage broad technical skills in software, hardware, and computer architecture to solve problems spanning all of these domains.
  • Fast problem-solving will be a critical skill as the product life cycle matures and gets closer to chip tape-out.
Cross-functional Aspects
  • You will be required to interact with many external teams including those leading the development of software tools and compilers, SOC performance models, and logic design and verification. Most of the external teams are located in other regions of the world such as North America or Asia. Thus, excellent communication skills are required to be successful in this role.
  • The digital IP team is led by Directors and Fellows with many years of domain experience to leverage and further develop skills valuable as you advance your career.
Job Qualifications
  • Minimum 10 year experience
  • Ability to map high-level Power/Performance/Area requirements into realizable HW architectures
  • Proven track record on architecture/design of highly parallel/SIMD/Vector/Matrix processing
  • Deep knowledge of:
    • RTL design/simulation/verification
    • C/C++ Embedded programming
    • Python/other high-level languages for modeling/automation
    • C-compilers and working with low-level and higher-level software teams
  • Understanding of system-level interplay:
    • AMBA bus protocols
    • Memory controllers
    • Bus fabrics
  • Good communicator/team-player
  • Basic knowledge of AI mathematical operations – with ability to learn deeper if only basic knowledge in this field
  • Basic Knowledge of DSP is preferrable: FFT/Filters/Convolution/Correlation
  • Good written and verbal English communication skills are required

Please note: The successful candidate may/will be responsible for security related tasks. The assignment may/will be in scope of security certifications, therefore a conscious and reliable way of working is necessary.

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