III/V Process Integration, Layout and Characterization Engineer

SCINTIL Photonics; Grenoble; Sur place; EUR 70 000 - 110 000; Plein temps

Avantages offerts par ce poste

Travel opportunities

Competitive salary and benefits

Résumé du poste

SCINTIL Photonics, Grenoble, France, seeks an III/V Process Integration, Layout and Characterization Engineer to own layout definition aligned with process integration. You will drive interactions with external foundries and collaborate with internal teams across design, industrialization, packaging and testing.

The role requires a strong background in process integration, hands-on layout experience, and proficiency in English.

Qualifications

• Master's degree or PhD in Materials Science, Semiconductor Physics, or a related field
• Minimum 5 years of experience in process integration (PIC, semiconductor, or MEMS) (or PhD + 2 years)
• Proficient in English (C1 level)
• Strong background in process integration (semiconductor or photonics)
• Hands-on experience in layout design tied to process flow
• Knowledge/experience with: InP / AsGa laser process flows, LNO (Lithium Niobate on Insulator), MTP / photonic integration platforms
• Familiarity with: Cleanroom processes (lithography, etch, deposition)
• PDKs and foundry design constraints
• Device physics (photonic / optoelectronic devices)
• Fluent in English (spoken and written)

Responsabilités

• Define and optimize process integration flows for photonic devices
• Translate process flows into robust layout designs (mask layouts)
• Ensure layout compliance with foundry design rules (DRC, LVS when applicable)
• Collaborate with design teams to ensure feasibility and performance
• Act as primary technical contact with external foundries (fabless model)
• Manage tape-outs, process reviews, and fabrication iterations
• Support debugging and yield improvement with foundry partners
• Contribute to device fabrication in partner or internal facilities when needed
• Perform electro-optical characterization of devices
• Analyze results and close the loop with design and process improvements
• Work closely with R&D and industrialization team members across Design, Process development, Packaging and Testing
• Support problem-solving across the full product lifecycle
• Experience working directly with external foundries or MPW runs
• Knowledge of packaging constraints in photonics
• Familiarity with layout tools (e.g., KLayout, Cadence, L-Edit)
• This position will require some regular travels abroad (Europe, US, Asia) (1 / quarter)
• Fluent in English (spoken and written), with the ability to clearly communicate technical concepts

Connaissances

Process integration

Layout design

Photonic integration platforms

Formation

Master's or PhD in Materials Science or Semiconductor Physics

Outils

KLayout

Cadence

L-Edit

Description du poste

III/V Process Integration, Layout and Characterization Engineer

Type et term of contract: CDI (full time, permanent)

Location: Grenoble, France

About us

SCINTIL Photonics is a fabless company developing and commercializing silicon photonics with integrated lasers for the AI datacenters. Based on SCINTIL Heterogeneous Integrated Photonics (SHIP™) technology, we enable low-latency, high-density and power-efficient ultra-high-speed optical interconnects. SCINTIL is an international company headquartered in France, with offices in Canada and the United States.

Position overview

Department: R&D

As a member of the R&D, the III/V Process Integration, Lay-out and Characterization Engineer will play a key role in the evaluation, selection and optimization of advanced technologies. The selected candidate will work directly with external III-V foundry partners and will also coordinate closely with internal departments (design, industrialization, packaging, testing).

The candidate will own layout definition aligned with process integration flows, drive interactions with foundries, and contribute to device fabrication, testing, and characterization.

Key responsibilities

Process Integration & Layout

• Define and optimize process integration flows for photonic devices
• Translate process flows into robust layout designs (mask layouts)
• Ensure layout compliance with foundry design rules (DRC, LVS when applicable)
• Collaborate with design teams to ensure feasibility and performance

Foundry Interface

• Act as primary technical contact with external foundries (fabless model)
• Manage tape-outs, process reviews, and fabrication iterations
• Support debugging and yield improvement with foundry partners

Fabrication & Characterization

• Contribute to device fabrication in partner or internal facilities when needed
• Perform electro-optical characterization of devices
• Analyze results and close the loop with design and process improvements

Cross-Functional Collaboration

• Work closely with R&D and industrialization team members across Design, Process development, Packaging and Testing
• Support problem-solving across the full product lifecycle

Qualifications

• Master's degree or PhD in Materials Science, Semiconductor Physics, or a related field
• Minimum 5 years of experience in process integration (PIC, semiconductor, or MEMS) (or PhD + 2 years)
• Proficient in English (C1 level)
• Technical expertise:

* Strong background in process integration (semiconductor or photonics)

* Hands-on experience in layout design tied to process flow

* Knowledge/experience with: InP / AsGa laser process flows, LNO (Lithium Niobate on Insulator), MTP / photonic integration platforms

• Familiarity with:

* Cleanroom processes (lithography, etch, deposition)

* PDKs and foundry design constraints

* Device physics (photonic / optoelectronic devices)

Experimental & Lab Skills

• Experience in device characterization (optical + electrical)
• Ability to analyze performance metrics and link back to process/design
• Practical approach to debugging and iteration

Soft Skills

• Strong problem-solving mindset
• Comfortable working in a fabless, multi-partner environment
• Excellent team player within an R&D setting
• Ability to operate across disciplines

Desirable Qualifications (Nice to Have)

• Experience working directly with external foundries or MPW runs
• Knowledge of packaging constraints in photonics
• Familiarity with layout tools (e.g., KLayout, Cadence, L-Edit, etc.)

• This position will require some regular travels abroad (Europe, US, Asia) (1 / quarter)

Communication

• Fluent in English (spoken and written), with the ability to clearly communicate technical concepts

Why Join Us

• Join an innovative company at the forefront of semiconductor photonic technology
• Work in a dynamic and collaborative environment
• Enjoy opportunities for career advancement and personal development
• Competitive salary and benefits package

Scintil Photonics is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

Learn more about SCINTIL Photonics : www.scintil-photonics.com