HW IP designer - Qualcomm - Guyancourt or Sophia, France

Qualcomm; Digne-les-Bains; On-site; EUR 65,000 - 90,000; Full time

Job summary

Qualcomm France S.A.R.L. is seeking an experienced HW IP designer to own unit specifications, develop RTL, and collaborate with architecture and verification teams across sites. You will drive microarchitecture definitions and ensure tight integration with SOC/ASIC flows.

Ideal candidates bring 4–5 years in microelectronics, strong RTL skills (Python/Verilog/C++), and experience with AMBA protocols. Proficiency in French and English is a plus in a multinational environment.

Qualifications

• Master’s or PhD level preferred with 2+ years ASIC design experience.
• Experience defining microarchitectures and writing clear specification documents.
• Proficiency in RTL coding/simulation and familiarity with SOC/ASIC design flows.
• Working knowledge of AMBA protocols (AXI, CHI) and English/French communication.

Responsibilities

• Derive unit specifications from Product Definition Requirements in collaboration with Architecture.
• Create RTL code and coordinate with verification team to ensure correct interpretation of specs.
• Work with verification and other teams to debug and implement ECOs.
• Engage with exploration and support teams across sites.

Skills

Python

Verilog

C++

French

English

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

Git

Svn

NcSim

Job description

Company:

Qualcomm France S.A.R.L.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Qualcomm is a global leader in wireless technology and innovation. Our cutting-edge solutions power the world’s most advanced mobile, automotive, networks and IoT devices. We are seeking a talented, experimented, and motivated HW IP designer to join our team in Qualcomm France-QITC and contribute to the next generation of semiconductor designs.

Qualcomm Interconnect Technology Center (QITC) has been breaking ground in interconnect design for 15 years by providing more efficient SoC NoC with faster time to market than existing bus interconnects and continues to innovate and deliver technology in line with the very latest evolutions in SoC design. Our work is at the backbone of the SoC, interconnecting all major IP solutions at Qualcomm.

As a HW IP designer, you will join a tightly knit team of seasoned engineers, bring your creativity to the team and will be the owner of different units from specification, microarchitecture to RTL code.

Preferred Qualifications

• Master’s degree in electrical engineering, digital design


• 4/5 years of microelectronics definition and design


• Ability to create robust micro-architectures.


• Ability to write clear specification document.


• Proficient in RTL coding/simulation.


• Good acknowledge of SOC/ASIC design flow.


• Good knowledge of AMBA protocols, AXI, CHI,...


• Self-driven, analytical, creative and methodical.


• Teamwork spirit with good oral and written communication skills.


• Ability to work in an international and multi-sites context.

Principal Duties and Responsibilities

• Starting from a Product Definition Requirement document, you will interact with the Architecture team and elaborate the specification of the Unit.


• The specification document will then be reviewed with peers and the verification team and will be the starting point for RTL coding and verification.


• You will have to work closely with the verification team to make sure that the specification is well understood and verified, during all the development phases.


• You will also have to collaborate with exploration and support teams.


• Eventually you will also have to bring your expertise for debug and performs ECO when necessary.

Skills

• Python/Verilog/C++


• Git/Svn


• NcSim


• French/English

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.


• OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.


• OR PhD in Science, Engineering, or related field.


• References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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If you would like more information about this role, please contact Qualcomm Careers.