Head of Quantum Theory & Applications — Fault-Tolerance

C12; Paris; On-site; EUR 92,000 - 108,000; Full time

Benefits offered by this job

Stock options

Conference trips

Meal vouchers

Mental health support

Training budget

Sabbatical leave

Paris offices

Team events

Job summary

C12 Quantum Electronics in Paris is seeking a Head of Theory & Applications to lead the Theory & Applications team, focusing on hardware modeling, quantum error correction, and industrial quantum algorithms. You will spearhead the roadmap and coordinate cross-disciplinary efforts with hardware and domain experts.

You will recruit, mentor, and structure the team, build collaborations with academia and partners, and balance scientific ambition with hardware feasibility and business impact.

Qualifications

• Strong background in quantum computing with expertise in Quantum Error Correction or Quantum Algorithms.
• Broad understanding of the quantum computing stack and ability to engage across theory and hardware.
• Architecture-level understanding of scalable quantum computing and fault-tolerant strategies.
• Demonstrated scientific leadership and ability to drive execution.

Responsibilities

• Define and drive the theory roadmap aligning with hardware development and business priorities.
• Strengthen the error correction strategy from benchmarking to fault-tolerance roadmap.
• Lead co-design efforts between hardware and theory teams for scalable architectures.
• Recruit, mentor and structure the theory team as the company grows.
• Establish collaborations with academia and research partners to boost scientific visibility.
• Balance research direction with hardware feasibility and business impact.

Skills

Quantum Error Correction

Quantum Algorithms

Job description

C12 Quantum Electronics in Paris is seeking a Head of Theory & Applications to lead the Theory & Applications team, focusing on hardware modeling, quantum error correction, and industrial quantum algorithms. You will spearhead the roadmap and coordinate cross-disciplinary efforts with hardware and domain experts.

You will recruit, mentor, and structure the team, build collaborations with academia and partners, and balance scientific ambition with hardware feasibility and business impact.