Digital Design Intern – IP Networking

Kalray; Montbonnot-Saint-Martin; Hybride; EUR 10 000 - 17 000; Plein temps

Avantages offerts par ce poste

Hybrid work

Meal vouchers

Team building activities

Laser tag

Escape games

Sailing

Skiing

Go-karting

Karaoke

Résumé du poste

Kalray is offering an internship in Montbonnot (France) with the hardware digital design team. You will contribute to the development of DSP IPs and DPUs for AI and HPC data centers, from microarchitecture to physical synthesis, on a cutting-edge 4nm process.

You will work on RTL design (SystemVerilog/Verilog/VHDL), timing analysis, and integration into networking subsystems, gaining hands-on experience across the full design cycle in an agile, collaborative environment.

Qualifications

• Hardware description language experience: SystemVerilog/Verilog/VHDL.
• Familiarity with logic synthesis and static timing analysis; EDA tools a plus.
• Scripting: Python, Tcl, Shell; C/C++ is a plus; interest in networks and protocols.

Responsabilités

• Analyze requirements and specifications for the IP.
• Define microarchitecture including pipelines, data paths, and memories.
• Write IP microarchitecture specifications and RTL design.
• Support unit verification and timing analysis of the IP.
• Perform synthesis and physical implementation study on 4nm tech node.
• Integrate IP into the networking subsystem and document work.

Connaissances

SystemVerilog

Verilog

VHDL

Logic synthesis

EDA tools

Python

Tcl

Shell

C/C++

Networking protocols

AMBA

Description du poste

Reporting to our hardware digital design team, you will contribute to the development of our latest-generation integrated circuits for AI and HPC datacenters. Our DPUs embed high-performance networking subsystems that must process data streams at line rate (>1.6Gbps), with strong constraints in terms of latency, area and power consumption.

In this context, you will be responsible for the design of a digital IP for one of these subsystems, from the definition of its microarchitecture through to physical synthesis. The exact scope of the IP will be defined according to the needs of our projects and your profile.

This is an opportunity for you to discover or deepen your knowledge of the electronics industry, develop your skills and put theory into practice through a complete design cycle, enhanced by AI.

As such, your main responsibilities will be the following:

• Analysis of the requirements, functional specifications and relevant protocols;
• Study of the state of the art and definition of the IP microarchitecture: pipeline, data paths, flow control, memories, performance / area / power consumption trade-offs;
• Writing of the microarchitecture specification;
• RTL design of the IP (SystemVerilog, Verilog or VHDL) according to the team’s design rules;
• Support for unit verification of the IP;
• Logic synthesis and physical implementation study (constraints, timing analysis, area and power consumption, place-and-route feasibility) on an advanced technology node (TSMC 4nm), with iterations on the microarchitecture to achieve the objectives;
• Integration of the IP into the networking subsystem and writing of the associated documentation.

REQUIRED AND DEVELOPABLE SKILLS

• Hardware description language (SystemVerilog, Verilog or VHDL);
• Knowledge of logic synthesis and static timing analysis; initial experience with EDA tools is a plus;
• Scripting languages (Python, Tcl, shell); C / C++ is a plus;
• Interest in networks and communication protocols (Ethernet, TCP/IP, PCIe); knowledge of AMBA protocols is a plus;

PROFILE

• You are curious, ambitious and passionate about high-tech and applications resulting from new technologies;
• You enjoy working as part of a team and taking initiatives;
• You are enthusiastic about being part of a human adventure and working in an agile environment;
• You are comfortable in English, particularly in a technical context.

Are you passionate about high-tech and cutting-edge technologies? Do you want to be part of a human adventure and develop in an agile, dynamic and collaborative environment? This internship is for you.

CONTRACT

• Contract type: Internship agreement
• Duration: 6 months
• Compensation: Depending on level of study
• Collective agreement: Metallurgy
• Benefits: Hybrid work, meal vouchers, team building and other activities such as laser tag, escape games, sailing, skiing, go-karting, karaoke and much more!
• Location: Montbonnot(38)

ABOUT KALRAY

Founded in 2008 as a spin-off from CEA, Kalray is a leading European semiconductor company, backed by major industrial investors such as Safran, NXP Semiconductors and Bpifrance. With more than 30 patent families and more than €100 million invested in R&D, our technology is paving the way for a new era in data processing.

Thanks to their patented “manycore” architecture, Kalray’s MPPA intelligent processors (known as DPU or xPU) are capable of managing multiple data streams in parallel – and without bottlenecks – enabling applications that process massive amounts of data to become smarter, more efficient and more energy-efficient, complementing traditional approaches (CPU and GPU).

Kalray’s offering includes hardware and software acceleration solutions, as well as a co-development – or design-ondemand – offering for processors and acceleration solutions optimized for specific uses in high-growth sectors such as data centers, AI gigafactories, 5G networks, Industry 4.0, space and defense, and many others.

Above all, Kalray is a team of passionate, enthusiastic and committed people who place excellence and collaboration at the heart of their work. Whether you are an intern or an apprentice, we will do everything we can to help you fully express your talent, develop your potential and contribute to the company’s success.

Our offices are located near Grenoble, in the French Alps, and we also have additional offices near Nice, in Sophia Antipolis, as well as in Romania.